Carrier transport analysis of high-performance poly-Si Nanowire transistor fabricated by advanced SPC with record-high electron mobility

M. Oda, K. Sakuma, Y. Kamimuta, M. Saitoh
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引用次数: 13

Abstract

This paper presents the fundamental carrier transport analysis of high-mobility poly-Si nanowire transistors (NW Tr). By adopting advanced SPC (solid-phase crystallization) process, record-high electron mobility (192cm2/Vs) and Ion (200μA/μm) at Ioff of 4nA/μm are achieved without using lasers or catalysts. Carrier density and temperature dependence of mobility, and also physical analysis of poly-Si crystallinity and the channel size, reveal that the origin of mobility degradation in conventional SPC poly-Si Tr. is Coulomb scattering due to defects inside grains as well as defects at grain boundaries and enhanced surface roughness scattering at poly-Si/gate oxide interface, all of which are weakened by advanced SPC process. At high carrier density, mobility of poly-Si nFETs and pFETs by advanced SPC process even exceeds bulk-Si (110) nFETs and (100) pFETs.
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高电子迁移率的高性能多晶硅纳米线晶体管的载流子输运分析
本文介绍了高迁移率多晶硅纳米线晶体管(nwtr)的基本载流子输运分析。通过采用先进的SPC(固相结晶)工艺,在不使用激光或催化剂的情况下,在4nA/μm下获得了创纪录的高电子迁移率(192cm2/Vs)和离子迁移率(200μA/μm)。载流子密度和温度对迁移率的依赖性,以及多晶硅结晶度和通道尺寸的物理分析表明,传统SPC多晶硅迁移率下降的原因是由于晶粒内部缺陷引起的库仑散射,以及晶界缺陷和多晶硅/氧化栅界面表面粗糙度散射的增强,这些都被先进的SPC工艺削弱了。在高载流子密度下,采用先进SPC工艺的多晶硅nfet和pfet的迁移率甚至超过了体硅(110)nfet和(100)pfet。
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