Comparison between matching parameters and fluctuations at the wafer level

Abstract

This paper compares the random local fluctuations, commonly known under the term of mismatch, with the variations that appear at the wafer level for the MOS transistor and the polysilicon resistor. In particular, it highlights the strong decrease of MOSFET matching performance when the device area is reduced, by comparison to the fluctuations at the wafer level. This amazing tendency involves that the well-known phenomenon responsible for the MOS transistor mismatch do not dominate for the smallest devices. In particular, the impact of polysilicon edge roughness induced by stochastic process during photolithography or etching is investigated.