T. Matsuo, M. Endo, S. Kishimura, A. Misaka, M. Sasago
{"title":"Lithography solution for 65-nm node system LSIs","authors":"T. Matsuo, M. Endo, S. Kishimura, A. Misaka, M. Sasago","doi":"10.1109/VLSIT.2002.1015450","DOIUrl":null,"url":null,"abstract":"For 65-nm node devices, we have systematically investigated the lithographic margin of electron-beam projection lithography (EPL), ArF lithography and vacuum ultraviolet (VUV) lithography. Among them, EPL has sufficient margin and excellent pattern fidelity and our experiments have demonstrated that it can fabricate 65-nm node device patterns. Therefore, EPL is a strong candidate for 65-nm node lithography.","PeriodicalId":103040,"journal":{"name":"2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-06-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2002.1015450","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
For 65-nm node devices, we have systematically investigated the lithographic margin of electron-beam projection lithography (EPL), ArF lithography and vacuum ultraviolet (VUV) lithography. Among them, EPL has sufficient margin and excellent pattern fidelity and our experiments have demonstrated that it can fabricate 65-nm node device patterns. Therefore, EPL is a strong candidate for 65-nm node lithography.