Y. Q. Wang, D. Gao, W. Hwang, C. Shen, Gang Zhang, G. Samudra, Y. Yeo, W. Yoo
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引用次数: 15
Abstract
A Si3N4/SiO2 double-tunneling layer is incorporated in a MONOS memory device structure with high-k HfO 2 charge storage layer for NAND-type memory application. Fast erasure of charges trapped in the high-k layer is enabled by enhanced hole current, accomplishing a large memory window of 2.9 V with electrical stress at 17.5 V for 100 (as and at -18 V for 5 ms. Incorporation of 1.6-1.8 nm thick Si3N4 in place of a part of the SiO2 tunneling layer resulted in fast program and erase (P/E) speed and small Vth shift over 104 endurance cycles
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