Thermocompression wafer-level 3-inch InP/SiO2/Si Heterobonding for optoelectronic integrations

Abstract

Driven by the urgent demand for advancements in silicon-based optoelectronics, this study achieved high-quality heterojunction integration of 3-inch InP, SiO₂, and Si materials, addressing the significant 8.1 % lattice mismatch between InP and Si. Utilizing thermocompression bonding of surfaces contacted in a liquid solution, the study achieved an effective bonding area of 89.4 % and a bonding strength of 8.7 MPa for InP/Si wafers under experimental conditions of 300 °C, 500 N pressure, and 0.1 MPa vacuum, Using a two-step surface activation method, the plasma and RCA surface activation mechanisms and defect induction analysis were elaborated in detail. The systematic investigation into the effects of vacuum, pressure, and temperature on bonding area and strength elucidated the underlying mechanisms. High-resolution transmission electron microscopy (HRTEM) analysis provides a visual analysis of the bonding interface, including the influence of different growth methods on the morphology of SiO₂, analysis of interface point defects and dislocations, and the insight into the lattice strain, Hooke's law helps to calculate the residual stress at the interface, overcoming the key challenge of heterogeneous bond interface stress measurement. The calculated residual stress of InP/SiO₂ interface is 109.91 MPa, and the residual stress of Si/SiO₂ interface is 125.98 MPa, which ensures the high reliability of the device. Wafer bonding increases the design flexibility of heterogeneous materials and provides a manufacturing approach for heterogeneous integrated laser diode (LD) chips. This work opens up a wide range of possibilities for the development of high-performance wafer-level III-V/SOI hybrid integrated devices.