S. Chae, K. Yoo, Byoung-Yong Park, S. Han, J. Ha, Jinwon Park
{"title":"Plasma induced charging damage on thin gate oxide","authors":"S. Chae, K. Yoo, Byoung-Yong Park, S. Han, J. Ha, Jinwon Park","doi":"10.1109/ICVC.1999.820983","DOIUrl":null,"url":null,"abstract":"The plasma damage of gate oxides with the thickness of 45 and 35 /spl Aring/ was investigated using NMOS and PMOS devices with poly-Si antennas. Poly etch was performed in a magnetically enhanced reactive ion etcher (MERIE) reactor using Cl/sub 2//HBr chemistry. The transistors in the antenna test pattern had the antenna ratio of 5000:1. Among the antenna patterns used in this study, the comb type antenna devices suffered more from charging damage during poly-Si etching. Two different methods of wet and NO type were employed to grow the gate oxides. The wet and NO gate oxides were grown in O/sub 2/+H/sub 2/ and O/sub 2/ ambient followed by NO anneal, respectively. In the bar type antenna pattern with the small length/width ratio (dummy antenna), the dependences of plasma damage on poly-Si etching, ion implantation and annealing conditions were not observed, However evident charging damage behavior is observed in the NMOS transistors having comb antenna, which were affected more by charging damage during poly-Si etching. The results of plasma damage characterization indicated that the device structure with amorphous Si (grain size:3000 /spl Aring/) on NO gate oxide is more resistent to the plasma damage than that of fine grain Si (grain size:300 /spl Aring/) on wet gate oxide.","PeriodicalId":13415,"journal":{"name":"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)","volume":"40 1","pages":"497-500"},"PeriodicalIF":0.0000,"publicationDate":"1999-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICVC.1999.820983","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The plasma damage of gate oxides with the thickness of 45 and 35 /spl Aring/ was investigated using NMOS and PMOS devices with poly-Si antennas. Poly etch was performed in a magnetically enhanced reactive ion etcher (MERIE) reactor using Cl/sub 2//HBr chemistry. The transistors in the antenna test pattern had the antenna ratio of 5000:1. Among the antenna patterns used in this study, the comb type antenna devices suffered more from charging damage during poly-Si etching. Two different methods of wet and NO type were employed to grow the gate oxides. The wet and NO gate oxides were grown in O/sub 2/+H/sub 2/ and O/sub 2/ ambient followed by NO anneal, respectively. In the bar type antenna pattern with the small length/width ratio (dummy antenna), the dependences of plasma damage on poly-Si etching, ion implantation and annealing conditions were not observed, However evident charging damage behavior is observed in the NMOS transistors having comb antenna, which were affected more by charging damage during poly-Si etching. The results of plasma damage characterization indicated that the device structure with amorphous Si (grain size:3000 /spl Aring/) on NO gate oxide is more resistent to the plasma damage than that of fine grain Si (grain size:300 /spl Aring/) on wet gate oxide.