{"title":"Interconnect technology: copper and low-k dielectrics","authors":"Hyeon-deok Lee","doi":"10.1109/ICVC.1999.820875","DOIUrl":null,"url":null,"abstract":"Summary form only given, as follows. The interconnect system in ULSI has drawn greater attention nowadays than ever before. This is because the minimization of RC delay of interconnect has to be satisfied in order to achieve high performance of logic device in the GHz era. The major approach to lower RC delay has been directed toward integration of copper and low-k dielectric materials. In this paper, the current status of copper (barrier, seed, and electroplating) and low-k dielectric technologies and their integration issues are discussed.","PeriodicalId":13415,"journal":{"name":"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)","volume":"6 1","pages":"201-"},"PeriodicalIF":0.0000,"publicationDate":"1999-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICVC.1999.820875","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Summary form only given, as follows. The interconnect system in ULSI has drawn greater attention nowadays than ever before. This is because the minimization of RC delay of interconnect has to be satisfied in order to achieve high performance of logic device in the GHz era. The major approach to lower RC delay has been directed toward integration of copper and low-k dielectric materials. In this paper, the current status of copper (barrier, seed, and electroplating) and low-k dielectric technologies and their integration issues are discussed.