Jeone-Hwan Son, Kunsik Park, J. Nam, Shin-Young Chung, Hyeong-Mo Yang, S. Park, Youngjong Lee, Kyungho Lee
{"title":"Blanket tilt implanted shallow trench isolation (BTI-STI) process for enhanced DRAM retention time characteristics","authors":"Jeone-Hwan Son, Kunsik Park, J. Nam, Shin-Young Chung, Hyeong-Mo Yang, S. Park, Youngjong Lee, Kyungho Lee","doi":"10.1109/ICVC.1999.820844","DOIUrl":null,"url":null,"abstract":"Blanket tilt implanted shallow trench isolation (BTI-STI) process is proposed and investigated for enhanced retention time characteristics of high density DRAM. It is confirmed that BTI-STI process can improve the tail retention time due to low surface channel doping and no degradation is observed for buried-channel p-MOSFET even at narrow width. The proposed process is useful for realizing future high density DRAM without increase in process complexity.","PeriodicalId":13415,"journal":{"name":"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)","volume":"74 1","pages":"122-124"},"PeriodicalIF":0.0000,"publicationDate":"1999-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICVC.1999.820844","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Blanket tilt implanted shallow trench isolation (BTI-STI) process is proposed and investigated for enhanced retention time characteristics of high density DRAM. It is confirmed that BTI-STI process can improve the tail retention time due to low surface channel doping and no degradation is observed for buried-channel p-MOSFET even at narrow width. The proposed process is useful for realizing future high density DRAM without increase in process complexity.
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