P. Batude, L. Brunet, C. Fenouillet-Béranger, D. Lattard, F. Andrieu, M. Vinet, L. Brevard, M. Ribotta, B. Previtali, C. Tabone, F. Ponthenier, N. Rambal, P. Sideris, X. Garros, M. Cassé, C. Theodorou, B. Sklénard, J. Lacord, P. Besson, F. Fournel, S. Kerdilès, P. Acosta-Alba, V. Mazzocchi, J. Hartmann, F. Mazen, S. Thuries, O. Billoint, P. Vivet, G. Sicard, G. Cibrario, M. Mouhdach, B. Giraud, CM. Ribotta, V. Lapras
{"title":"Opportunities and challenges brought by 3D-sequential integration","authors":"P. Batude, L. Brunet, C. Fenouillet-Béranger, D. Lattard, F. Andrieu, M. Vinet, L. Brevard, M. Ribotta, B. Previtali, C. Tabone, F. Ponthenier, N. Rambal, P. Sideris, X. Garros, M. Cassé, C. Theodorou, B. Sklénard, J. Lacord, P. Besson, F. Fournel, S. Kerdilès, P. Acosta-Alba, V. Mazzocchi, J. Hartmann, F. Mazen, S. Thuries, O. Billoint, P. Vivet, G. Sicard, G. Cibrario, M. Mouhdach, B. Giraud, CM. Ribotta, V. Lapras","doi":"10.1109/IITC51362.2021.9537356","DOIUrl":null,"url":null,"abstract":"The aim of this paper is to present the 3D-sequential integration and its main prospective application sectors. The presentation will also give a synoptic view of all the key enabling process steps required to build high performance Si CMOS integrated by 3D-sequential with thermal budget preserving the integrity of active devices and interconnects and will sketch a status and prospect on current low temperature device performance.","PeriodicalId":6823,"journal":{"name":"2021 IEEE International Interconnect Technology Conference (IITC)","volume":"14 1","pages":"1-1"},"PeriodicalIF":0.0000,"publicationDate":"2021-07-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 IEEE International Interconnect Technology Conference (IITC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IITC51362.2021.9537356","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The aim of this paper is to present the 3D-sequential integration and its main prospective application sectors. The presentation will also give a synoptic view of all the key enabling process steps required to build high performance Si CMOS integrated by 3D-sequential with thermal budget preserving the integrity of active devices and interconnects and will sketch a status and prospect on current low temperature device performance.