Switched-capacitor circuit techniques in submicron low-voltage CMOS

Abstract

The continued down scaling of submicron CMOS technology forces innovation of practical and economical circuits that will tolerate reduced headroom (reduced power supply voltage) due to lowering of the technology's maximum allowable voltage. Given the relatively large threshold voltages with respect to the shrinking headroom, a group of widely used analog signal processing building blocks that are made of switched-capacitor (SC) stages will encounter severe overdrive problems when operating at these low-voltage conditions. This tutorial summarizes some of the well-known solutions currently in use and problems associated with these solutions, and proposes novel circuit techniques for truly low-voltage switched-capacitor applications.