Reassessing InGaAs for Logic: Mobility Extraction in sub-10nm Fin-Width FinFETs

Abstract

We study the performance degradation of InGaAs FinFETs as they scale to sub-10 nm fin width. This is often attributed to degradation in intrinsic transport parameters. High frequency measurements, however, indicate increasingly severe oxide trapping as the fin width narrows. This is confirmed by pulsed-IV measurements. A new mobility extraction method using concurrent S-parameter and DC-IV measurements avoids the impact of oxide trapping and reveals promising mobility in thin-channel InGaAs planar MOSFETs and narrow-width FinFETs. Our study suggests that performance degradation of InGaAs FinFETs is largely an extrinsic phenomenon that can be engineered around and that the potential performance of deeply-scaled InGaAs FinFETs is significantly underestimated.