Application of full chip OPC to quarter micron logic device

Kyune-Jin Shim, Ki-yeop Park, Won Gyu Lee, Dai-Hoon Lee
{"title":"Application of full chip OPC to quarter micron logic device","authors":"Kyune-Jin Shim, Ki-yeop Park, Won Gyu Lee, Dai-Hoon Lee","doi":"10.1109/ICVC.1999.820864","DOIUrl":null,"url":null,"abstract":"Model based full chip Optical Proximity Correction (OPC) was applied to logic devices with a minimum gate length of 0.24 /spl mu/m. Two empirical models were used in order to correct for both the 1D optical proximity effect and the 2D optical proximity effect simultaneously. OPC features such as line bias and hammer head were effective in reducing critical dimension variation and line shortening. Increased process margin and reduction in interconnection resistance were obtained.","PeriodicalId":13415,"journal":{"name":"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)","volume":"517 1","pages":"171-173"},"PeriodicalIF":0.0000,"publicationDate":"1999-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICVC.1999.820864","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

Model based full chip Optical Proximity Correction (OPC) was applied to logic devices with a minimum gate length of 0.24 /spl mu/m. Two empirical models were used in order to correct for both the 1D optical proximity effect and the 2D optical proximity effect simultaneously. OPC features such as line bias and hammer head were effective in reducing critical dimension variation and line shortening. Increased process margin and reduction in interconnection resistance were obtained.
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全片OPC在四分之一微米逻辑器件中的应用
基于模型的全芯片光学邻近校正(OPC)应用于最小栅极长度为0.24 /spl mu/m的逻辑器件。为了同时校正一维光学接近效应和二维光学接近效应,采用了两个经验模型。OPC特征如线偏和锤头在减小临界尺寸变化和缩短线方面是有效的。提高了工艺裕度,降低了互连电阻。
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