Charge trapping dependence on the physical structure of ultra-thin ALD-HfSiON/TiN gate stacks

Positive bias temperature instability (PBTI) is investigated in ultra-thin high-k films as a function of dielectric thickness on two different interfaces: SiO/sub 2/ and SiON. It is shown that charge trapping-induced threshold voltage (V/sub TH/) instability is exponentially dependent on dielectric thickness (or equivalent oxide thickness [EOT]) in the thickness range investigated. We propose that the significantly reduced charge trapping at thicknesses less than 2.0 nm is due to a change in the physical structure from suppressed crystallization at lesser thicknesses, resulting in reduced trap density. It is also observed that the SiON interface shows higher V/sub TH/ instability than the corresponding SiO/sub 2/ interface, while thickness dependence is the same for both.