采用增强型ANS-ONO工艺和氮化接口的高可扩展和可靠的多位/单元氮化物捕获非易失性存储器

2006 International Electron Devices Meeting Pub Date : 2006-12-01 DOI:10.1109/IEDM.2006.346824

Y. Shih, E. Lai, J. Hsieh, T. Hsu, M.D. Wu, C. Lu, K. Ni, T.Y. Chou, L.W. Yang, K. Hsieh, M. Liaw, W.P. Lu, K.C. Chen, J. Ku, F. Ni, R. Liu, Chih-Yuan Lu

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引用次数: 6

摘要

使用BTBT-HH擦除的多比特/单元氮化物捕获NVM (Eitan等，2000年和2005年)由于界面陷阱(NIT)的产生而遭受“明显”的VT损失。阵列氮化密封(ANS) ONO工艺(Shih等人，2005)通过阻止氢气进入界面来消除这种VT损失。在这项工作中，我们进一步为ANS-ONO工艺配备了氮化Si/SiO2界面。通过在低能埋藏扩散(BD)注入后引入快速热氮化(RTN)，该新工艺不仅提供了对高温诱导的NIT产生的更强免疫力，而且还提供了扩展BD的途径。该新工艺成功制备了256Mb的测试芯片，具有良好的自然产率(>80%)和可靠性。我们的新工艺集成显示了出色的可靠性，可扩展性和多比特/单元氮化物捕获存储器的可制造性

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Highly Scalable and Reliable Multi-bit/cell Nitride Trapping Nonvolatile Memory Using Enhanced ANS-ONO Process with A Nitridized Interface

Multi-bit/cell nitride trapping NVM (Eitan et al., 2000 and 2005) using BTBT-HH erase suffers an "apparent" VT loss due to interface trap (NIT) generation. The array-nitride-sealing (ANS) ONO process (Shih et al., 2005) eliminates this VT loss by blocking hydrogen from the interface. In this work we further outfit the ANS-ONO process with a nitridized Si/SiO2 interface. By introducing a rapid thermal nitridation (RTN) after a low-energy buried diffusion (BD) implantation, the new process provides not only more immunity to HH-induced NIT generation but also a path to scale the BD. A 256Mb testing chip is successfully fabricated by the new approach with excellent natural good yield (>80%) and reliability. Our new process integration shows excellent reliability, scalability, and manufacturability for multi-bit/cell nitride trapping memory

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2006 International Electron Devices Meeting

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