{"title":"基于邻域函数提取的任意缺陷诊断","authors":"R. Desineni, R. D. Blanton","doi":"10.1109/VTS.2005.41","DOIUrl":null,"url":null,"abstract":"We present a methodology for diagnosing arbitrary defects in digital integrated circuits (ICs). Rather than using one or a set of fault models in a cause-effect or effect-cause approach, our methodology derives defect behavior from, the test set, the circuit and its response, and the physical neighbors that surround a potential defect location. The defect locations themselves are identified using a model-independent stage. The methodology enables accurate identification of defect location and behavior through validation via simulation using passing and additional diagnostic test patterns. A byproduct of our methodology is the distinction that can be made among stuck-fault equivalencies which results in improved diagnostic resolution. Several types of shorts and opens are used to demonstrate the applicability of our approach to the diagnosis of arbitrary defects.","PeriodicalId":268324,"journal":{"name":"23rd IEEE VLSI Test Symposium (VTS'05)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"41","resultStr":"{\"title\":\"Diagnosis of arbitrary defects using neighborhood function extraction\",\"authors\":\"R. Desineni, R. D. Blanton\",\"doi\":\"10.1109/VTS.2005.41\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We present a methodology for diagnosing arbitrary defects in digital integrated circuits (ICs). Rather than using one or a set of fault models in a cause-effect or effect-cause approach, our methodology derives defect behavior from, the test set, the circuit and its response, and the physical neighbors that surround a potential defect location. The defect locations themselves are identified using a model-independent stage. The methodology enables accurate identification of defect location and behavior through validation via simulation using passing and additional diagnostic test patterns. A byproduct of our methodology is the distinction that can be made among stuck-fault equivalencies which results in improved diagnostic resolution. Several types of shorts and opens are used to demonstrate the applicability of our approach to the diagnosis of arbitrary defects.\",\"PeriodicalId\":268324,\"journal\":{\"name\":\"23rd IEEE VLSI Test Symposium (VTS'05)\",\"volume\":\"45 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"41\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"23rd IEEE VLSI Test Symposium (VTS'05)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VTS.2005.41\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"23rd IEEE VLSI Test Symposium (VTS'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTS.2005.41","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Diagnosis of arbitrary defects using neighborhood function extraction
We present a methodology for diagnosing arbitrary defects in digital integrated circuits (ICs). Rather than using one or a set of fault models in a cause-effect or effect-cause approach, our methodology derives defect behavior from, the test set, the circuit and its response, and the physical neighbors that surround a potential defect location. The defect locations themselves are identified using a model-independent stage. The methodology enables accurate identification of defect location and behavior through validation via simulation using passing and additional diagnostic test patterns. A byproduct of our methodology is the distinction that can be made among stuck-fault equivalencies which results in improved diagnostic resolution. Several types of shorts and opens are used to demonstrate the applicability of our approach to the diagnosis of arbitrary defects.