通过新的自动测试设备功能，满足1 Gbps并行RapidIO/spl reg/接口的测试挑战

23rd IEEE VLSI Test Symposium (VTS'05) Pub Date : 2005-05-01 DOI:10.1109/VTS.2005.55

Darren Aaberge, K. Mockler, Dieu Van Dinh, R. Belleau, Tim Donovan, R. Hewlitt

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摘要

本文介绍了一种测试1 Gbps并行RapidIO/spl reg/接口规范的方法。该总线的独特测试要求要求应用新的测试技术以及新的ATE功能。将识别对并行源同步总线很重要的ATE性能属性，并提供测量这些属性的方法。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Meeting the test challenges of the 1 Gbps parallel RapidIO/spl reg/ interface with new automatic test equipment capabilities

This paper describes an approach to testing the 1 Gbps Parallel RapidIO/spl reg/ interface specifications. The unique test requirements for this bus require the application of new test techniques as well as new ATE capabilities. ATE performance attributes important for parallel source-synchronous buses will be identified and presented with methods to measure these attributes.

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23rd IEEE VLSI Test Symposium (VTS'05)

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