一种实现动态电压和频率缩放技术的低功耗多媒体处理器

2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC) Pub Date : 2013-04-29 DOI:10.1109/ASPDAC.2013.6509563

T. Enomoto, Nobuaki Kobayashi

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引用次数: 1

摘要

研制了一种DVFS控制的90纳米CMOS多媒体处理器。为了充分发挥DVFS的优势，我们开发了能够预测最佳时钟频率和最佳电源电压的A2BC算法。DVFS控制的多媒体处理器的功耗测量值明显降低。因此，采用A2BC算法的DVFS是未来视频编码应用中最有用的功耗降低方法之一。

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A low power multimedia processor implementing dynamic voltage and frequency scaling technique

A DVFS controlled 90-nm CMOS multimedia processor was developed. To make full use of the advantages of DVFS, we developed the A2BC algorithm that can predict the optimum clock frequency and the optimum supply voltage. The measured power dissipation of the DVFS controlled multimedia processor was significantly reduced. Thus, DVFS employing the A2BC algorithm is one of the most useful power reduction for future video encoding applications.

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2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC)

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