H. Enichlmair, J. M. Park, S. Carniello, B. Loeffler, R. Minixhofer, M. Levy
{"title":"p型高压LDMOS晶体管的热载流子应力退化模式","authors":"H. Enichlmair, J. M. Park, S. Carniello, B. Loeffler, R. Minixhofer, M. Levy","doi":"10.1109/IRPS.2009.5173291","DOIUrl":null,"url":null,"abstract":"The hot carrier stress induced device degradation of a p-type LDMOS high voltage transistor is investigated at different stress conditions. The influence of shallow trench corner rounding and carbon ion implantation into the shallow trench region is discussed. Numerical device simulations, charge pumping measurements and electrical characterisations are used for these investigations.","PeriodicalId":345860,"journal":{"name":"2009 IEEE International Reliability Physics Symposium","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":"{\"title\":\"Hot carrier stress degradation modes in p-type high voltage LDMOS transistors\",\"authors\":\"H. Enichlmair, J. M. Park, S. Carniello, B. Loeffler, R. Minixhofer, M. Levy\",\"doi\":\"10.1109/IRPS.2009.5173291\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The hot carrier stress induced device degradation of a p-type LDMOS high voltage transistor is investigated at different stress conditions. The influence of shallow trench corner rounding and carbon ion implantation into the shallow trench region is discussed. Numerical device simulations, charge pumping measurements and electrical characterisations are used for these investigations.\",\"PeriodicalId\":345860,\"journal\":{\"name\":\"2009 IEEE International Reliability Physics Symposium\",\"volume\":\"52 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-04-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"14\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 IEEE International Reliability Physics Symposium\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IRPS.2009.5173291\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 IEEE International Reliability Physics Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IRPS.2009.5173291","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Hot carrier stress degradation modes in p-type high voltage LDMOS transistors
The hot carrier stress induced device degradation of a p-type LDMOS high voltage transistor is investigated at different stress conditions. The influence of shallow trench corner rounding and carbon ion implantation into the shallow trench region is discussed. Numerical device simulations, charge pumping measurements and electrical characterisations are used for these investigations.