R. Leuschner, U. Klostermann, H. Park, F. Dahmani, R. Dittrich, C. Grigis, K. Hernan, S. Mege, C. Park, M. C. Clech, G. Y. Lee, S. Bournat, L. Altimime, G. Mueller
{"title":"热选择MRAM具有2位单元能力，适用于65nm以上的技术节点","authors":"R. Leuschner, U. Klostermann, H. Park, F. Dahmani, R. Dittrich, C. Grigis, K. Hernan, S. Mege, C. Park, M. C. Clech, G. Y. Lee, S. Bournat, L. Altimime, G. Mueller","doi":"10.1109/IEDM.2006.346986","DOIUrl":null,"url":null,"abstract":"We report on a novel thermal select (TS) MRAM with multilevel programming capability. Exchange bias pinning of a magnetic free layer (FL) was used to achieve a thermally stable bit and to reduce writing currents. This report shows experimental data for a TS-based magnetic tunnel junction (MTJ) with a size of 50 times90 nm2, the smallest size reported so far. Multilevel capability with 2 bits per 1-transistor and 1-MTJ (1T1MTJ) is also demonstrated on a 70 times 140 nm2 MTJ. With the advanced 2-bit cell concept, a 70% increase in effective bit density can be achieved at 65 nm technology node","PeriodicalId":366359,"journal":{"name":"2006 International Electron Devices Meeting","volume":"31 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Thermal Select MRAM with a 2-bit Cell Capability for beyond 65 nm Technology Node\",\"authors\":\"R. Leuschner, U. Klostermann, H. Park, F. Dahmani, R. Dittrich, C. Grigis, K. Hernan, S. Mege, C. Park, M. C. Clech, G. Y. Lee, S. Bournat, L. Altimime, G. Mueller\",\"doi\":\"10.1109/IEDM.2006.346986\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We report on a novel thermal select (TS) MRAM with multilevel programming capability. Exchange bias pinning of a magnetic free layer (FL) was used to achieve a thermally stable bit and to reduce writing currents. This report shows experimental data for a TS-based magnetic tunnel junction (MTJ) with a size of 50 times90 nm2, the smallest size reported so far. Multilevel capability with 2 bits per 1-transistor and 1-MTJ (1T1MTJ) is also demonstrated on a 70 times 140 nm2 MTJ. With the advanced 2-bit cell concept, a 70% increase in effective bit density can be achieved at 65 nm technology node\",\"PeriodicalId\":366359,\"journal\":{\"name\":\"2006 International Electron Devices Meeting\",\"volume\":\"31 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 International Electron Devices Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2006.346986\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2006.346986","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Thermal Select MRAM with a 2-bit Cell Capability for beyond 65 nm Technology Node
We report on a novel thermal select (TS) MRAM with multilevel programming capability. Exchange bias pinning of a magnetic free layer (FL) was used to achieve a thermally stable bit and to reduce writing currents. This report shows experimental data for a TS-based magnetic tunnel junction (MTJ) with a size of 50 times90 nm2, the smallest size reported so far. Multilevel capability with 2 bits per 1-transistor and 1-MTJ (1T1MTJ) is also demonstrated on a 70 times 140 nm2 MTJ. With the advanced 2-bit cell concept, a 70% increase in effective bit density can be achieved at 65 nm technology node
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
