镍基FUSI栅极:45纳米及以上节点的CMOS集成

2006 International Electron Devices Meeting Pub Date : 2006-12-01 DOI:10.1109/IEDM.2006.346759

T. Hoffmann, A. Veloso, A. Lauwers, H. Yu, H. Tigelaar, M. V. van Dal, T. Chiarella, C. Kerner, T. Kauerauf, A. Shickova, R. Mitsuhashi, I. Satoru, M. Niwa, A. Rothschild, B. Froment, J. Ramos, A. Nackaerts, M. Rosmeulen, S. Brus, C. Vrancken, P. Absil, M. Jurczak, S. Biesemans, J. Kittl

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引用次数: 14

摘要

本文首次对FUSI栅极的可制造性进行了全面评估，涵盖了集成、过程控制、可靠性、匹配、器件设计和电路级效益等关键方面。由于采用选择性和可控的聚反蚀刻工艺，实现了双工作功能镍基FUSI CMOS电路，具有创纪录的环形振荡器性能(高vt应用)(VDD=1.1V和20pA/ ma off时17ps)，满足ITRS 45nm节点对低功耗CMOS的要求

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Ni-based FUSI gates: CMOS Integration for 45nm node and beyond

This work reports the first comprehensive evaluation of FUSI gates for manufacturability, covering the key aspects of integration, process control, reliability, matching, device design and circuit-level benefit. Thanks to a selective and controlled poly etch-back process, dual work-function Ni-based FUSI CMOS circuits with record ring oscillator performance (high-VT applications) have been achieved (17ps at VDD=1.1V and 20pA/mum Ioff), meeting the ITRS 45nm node requirement for low power CMOS

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2006 International Electron Devices Meeting

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