Gbps DDR5系统的高级飞传路由拓扑

2022 IEEE 31st Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS) Pub Date : 2022-10-09 DOI:10.1109/EPEPS53828.2022.9947171

Shinyoun Park, Vinod Arjun Huddar

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引用次数: 0

摘要

从DDR3及以后，fly-by被广泛使用，因为它可以通过提供更小的走线存根和电容负载来支持高数据速率操作。即便如此，超过一定数量的加载，fly-by在跟上高数据速率方面也开始出现问题。为了适应更大的负载，要么需要降低数据速率，要么需要先进的均衡技术。为了解决飞接拓扑的这一限制，我们提出了先进的飞接拓扑路由。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Advanced Fly-By Routing Topology for Gbps DDR5 Systems

From DDR3 and beyond, the fly-by has been widely used as it can support high data rate operations by providing smaller trace stubs and capacitive loadings. Even so, beyond a certain number of loadings, the fly-by also starts to have trouble in keeping up with high data rates. To accommodate larger loadings, either data rate needs to be reduced or advanced equalization techniques are required. To address this limitation of fly-by topology, we propose advanced fly-by topology routing.

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2022 IEEE 31st Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)

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