B. Ju, S.C. Song, T. Lee, B. Sassman, C. Kang, B. Lee, R. Jammy
{"title":"一种新型的原位等离子体处理无损伤金属/高k栅堆RIE工艺","authors":"B. Ju, S.C. Song, T. Lee, B. Sassman, C. Kang, B. Lee, R. Jammy","doi":"10.1109/IEDM.2006.346866","DOIUrl":null,"url":null,"abstract":"A dry etch process for metal/high-k stacks has been developed to solve the integration problems associated with wet etch removal of high-k dielectric from the source and drain (S/D) areas. An in-situ plasma (O2) treatment has been introduced for the first time to cure the damage induced by the high-k dry etch process. Excellent electrical performances, such as dramatically improved leakage current, superior Ion/Ioff performance, and suppressed short channel effects (gate induced drain leakage, drain-induced barrier lowering, Vt distribution) are achieved. With this novel process, metal/high-k gate stack dry etch process for very short channel devices becomes more manufacturing worthy, which has been one of the critical integration challenges in realizing gate first CMOSFETs with metal/high-k","PeriodicalId":366359,"journal":{"name":"2006 International Electron Devices Meeting","volume":"3 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"A novel in situ plasma treatment for damage-free metal/high-k gate stack RIE process\",\"authors\":\"B. Ju, S.C. Song, T. Lee, B. Sassman, C. Kang, B. Lee, R. Jammy\",\"doi\":\"10.1109/IEDM.2006.346866\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A dry etch process for metal/high-k stacks has been developed to solve the integration problems associated with wet etch removal of high-k dielectric from the source and drain (S/D) areas. An in-situ plasma (O2) treatment has been introduced for the first time to cure the damage induced by the high-k dry etch process. Excellent electrical performances, such as dramatically improved leakage current, superior Ion/Ioff performance, and suppressed short channel effects (gate induced drain leakage, drain-induced barrier lowering, Vt distribution) are achieved. With this novel process, metal/high-k gate stack dry etch process for very short channel devices becomes more manufacturing worthy, which has been one of the critical integration challenges in realizing gate first CMOSFETs with metal/high-k\",\"PeriodicalId\":366359,\"journal\":{\"name\":\"2006 International Electron Devices Meeting\",\"volume\":\"3 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 International Electron Devices Meeting\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2006.346866\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 International Electron Devices Meeting","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2006.346866","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A novel in situ plasma treatment for damage-free metal/high-k gate stack RIE process
A dry etch process for metal/high-k stacks has been developed to solve the integration problems associated with wet etch removal of high-k dielectric from the source and drain (S/D) areas. An in-situ plasma (O2) treatment has been introduced for the first time to cure the damage induced by the high-k dry etch process. Excellent electrical performances, such as dramatically improved leakage current, superior Ion/Ioff performance, and suppressed short channel effects (gate induced drain leakage, drain-induced barrier lowering, Vt distribution) are achieved. With this novel process, metal/high-k gate stack dry etch process for very short channel devices becomes more manufacturing worthy, which has been one of the critical integration challenges in realizing gate first CMOSFETs with metal/high-k