新议题7B:超低电压VLSI电路和系统的挑战和方向:CMOS和超越

B. Kaminska, B. Courtois, M. Alioto
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摘要

在这个演讲中,一个统一的视角给出了超低电压(ULV) VLSI电路和系统的设计挑战,以及解决这些挑战的方向。本文描述了创新的方法来提高超低电压系统的能源效率,同时保持足够的弹性和低开销的产量。基于65纳米到28纳米原型的测试,给出了实验结果,以定量了解可实现的效益。重点是需要极高能源效率的应用,例如紧凑型便携式设备和能源自主VLSI系统。虽然CMOS是可预见未来的主流选择,但隧道场效应管(tfet)是非常有前途的替代方案,有利于更积极的电压缩放和降低能量。尽管尚不成熟,器件电路协同设计已被证明是该技术成功的关键。通过代表性指标和车辆电路,在一般框架中讨论了tfet的潜力,强调了它们的采用将如何影响设计。
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New topic session 7B: Challenges and directions for ultra-low voltage VLSI circuits and systems: CMOS and beyond
In this talk, a unitary perspective is given on the design challenges involved in ultra-low voltage (ULV) VLSI circuits and systems, as well as on directions to tackle them. Innovative approaches are described to improve the energy efficiency of ULV systems, while maintaining adequate resiliency and yield with low overhead. Experimental results based on the testing of 65-nm to 28-nm prototypes are presented to develop a quantitative sense of the achievable benefits. Emphasis is given on applications that require extremely high energy efficiency, such as compact portable devices and energy-autonomous VLSI systems. Although CMOS is the mainstream choice for the foreseeable future, Tunnel FETs (TFETs) are introduced as very promising alternative that favors more aggressive voltage scaling and energy reduction. Although still immature, device-circuit co-design is shown to be critical to the success of such technology. Potential of TFETs is discussed in a general framework through representative metrics and vehicle circuits, emphasizing how design will be impacted by their adoption.
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