{"title":"扫描链保持时间故障诊断的鲁棒新范式","authors":"Chao-Wen Tzeng, Jeffrey Hsu, Shi-Yu Huang","doi":"10.1049/iet-cdt:20060205","DOIUrl":null,"url":null,"abstract":"Hold-time violation is a common cause of failure at scan chains. A robust new paradigm for diagnosing such failure is presented in this paper. As compared to previous methods, the major advantage of ours is the ability to tolerate non-ideal conditions, e.g., under the presence of certain core logic faults or for those faults that manifest themselves intermittently. We first formulate the diagnosis problem as a delay insertion process. Then, two algorithms including a greedy algorithm and a so-called best-alignment based algorithm are proposed. Experimental results on a number of real designs are presented to demonstrate its effectiveness","PeriodicalId":356198,"journal":{"name":"2006 International Symposium on VLSI Design, Automation and Test","volume":"111 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":"{\"title\":\"A New Robust Paradigm for Diagnosing Hold-Time Faults in Scan Chains\",\"authors\":\"Chao-Wen Tzeng, Jeffrey Hsu, Shi-Yu Huang\",\"doi\":\"10.1049/iet-cdt:20060205\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Hold-time violation is a common cause of failure at scan chains. A robust new paradigm for diagnosing such failure is presented in this paper. As compared to previous methods, the major advantage of ours is the ability to tolerate non-ideal conditions, e.g., under the presence of certain core logic faults or for those faults that manifest themselves intermittently. We first formulate the diagnosis problem as a delay insertion process. Then, two algorithms including a greedy algorithm and a so-called best-alignment based algorithm are proposed. Experimental results on a number of real designs are presented to demonstrate its effectiveness\",\"PeriodicalId\":356198,\"journal\":{\"name\":\"2006 International Symposium on VLSI Design, Automation and Test\",\"volume\":\"111 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2006-04-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"14\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 International Symposium on VLSI Design, Automation and Test\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1049/iet-cdt:20060205\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 International Symposium on VLSI Design, Automation and Test","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1049/iet-cdt:20060205","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A New Robust Paradigm for Diagnosing Hold-Time Faults in Scan Chains
Hold-time violation is a common cause of failure at scan chains. A robust new paradigm for diagnosing such failure is presented in this paper. As compared to previous methods, the major advantage of ours is the ability to tolerate non-ideal conditions, e.g., under the presence of certain core logic faults or for those faults that manifest themselves intermittently. We first formulate the diagnosis problem as a delay insertion process. Then, two algorithms including a greedy algorithm and a so-called best-alignment based algorithm are proposed. Experimental results on a number of real designs are presented to demonstrate its effectiveness