{"title":"高性能RISC微处理器C4/CBGA互连技术的热管理:摩托罗拉PowerPC 620/sup TM/微处理器","authors":"G. Kroman","doi":"10.1109/ECTC.1996.517455","DOIUrl":null,"url":null,"abstract":"This paper presents various thermal management options for a high-performance RISC microprocessor available for controlled-collapse-chip-connection (C4) die attached to a ceramic-ball-grid-array substrate (CBGA), as they apply to air-cooled systems. Computational-fluid dynamics (CFD) methods are used to solve the conjugate heat transfer problems and a thermal test vehicle mounted to a printed-circuit board was used to validate the models. The internal package's contribution is typically less than 18% of the overall junction-to-ambient temperature rise. Of this 18%, approximately 85% is associated with the thermal paste internally sealed; while, the lid and the silicon chip account for the other 15% (approximately equal). For moderate airflow applications in the 1 to 4 m/s, the PowerPC 620 microprocessor will require a relatively large heat sink, approximately 20 times that of the C4/CBGA package, to maintain its die-junction temperature. The proper selection of a thermal interface material is critical in minimizing the thermal contact resistance between the package and the heat sink. Considering, the low interface pressure, the synthetic grease offers the best performance.","PeriodicalId":143519,"journal":{"name":"1996 Proceedings 46th Electronic Components and Technology Conference","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-05-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Thermal management of a C4/CBGA interconnect technology for a high-performance RISC microprocessor: the Motorola PowerPC 620/sup TM/ microprocessor\",\"authors\":\"G. Kroman\",\"doi\":\"10.1109/ECTC.1996.517455\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents various thermal management options for a high-performance RISC microprocessor available for controlled-collapse-chip-connection (C4) die attached to a ceramic-ball-grid-array substrate (CBGA), as they apply to air-cooled systems. Computational-fluid dynamics (CFD) methods are used to solve the conjugate heat transfer problems and a thermal test vehicle mounted to a printed-circuit board was used to validate the models. The internal package's contribution is typically less than 18% of the overall junction-to-ambient temperature rise. Of this 18%, approximately 85% is associated with the thermal paste internally sealed; while, the lid and the silicon chip account for the other 15% (approximately equal). For moderate airflow applications in the 1 to 4 m/s, the PowerPC 620 microprocessor will require a relatively large heat sink, approximately 20 times that of the C4/CBGA package, to maintain its die-junction temperature. The proper selection of a thermal interface material is critical in minimizing the thermal contact resistance between the package and the heat sink. Considering, the low interface pressure, the synthetic grease offers the best performance.\",\"PeriodicalId\":143519,\"journal\":{\"name\":\"1996 Proceedings 46th Electronic Components and Technology Conference\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-05-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1996 Proceedings 46th Electronic Components and Technology Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECTC.1996.517455\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1996 Proceedings 46th Electronic Components and Technology Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECTC.1996.517455","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Thermal management of a C4/CBGA interconnect technology for a high-performance RISC microprocessor: the Motorola PowerPC 620/sup TM/ microprocessor
This paper presents various thermal management options for a high-performance RISC microprocessor available for controlled-collapse-chip-connection (C4) die attached to a ceramic-ball-grid-array substrate (CBGA), as they apply to air-cooled systems. Computational-fluid dynamics (CFD) methods are used to solve the conjugate heat transfer problems and a thermal test vehicle mounted to a printed-circuit board was used to validate the models. The internal package's contribution is typically less than 18% of the overall junction-to-ambient temperature rise. Of this 18%, approximately 85% is associated with the thermal paste internally sealed; while, the lid and the silicon chip account for the other 15% (approximately equal). For moderate airflow applications in the 1 to 4 m/s, the PowerPC 620 microprocessor will require a relatively large heat sink, approximately 20 times that of the C4/CBGA package, to maintain its die-junction temperature. The proper selection of a thermal interface material is critical in minimizing the thermal contact resistance between the package and the heat sink. Considering, the low interface pressure, the synthetic grease offers the best performance.