倒装芯片底部填充封装过程中填充过程和空穴形成的分析与数值分析

IF 1.7 4区 材料科学 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Soldering & Surface Mount Technology Pub Date : 2021-12-15 DOI:10.1108/ssmt-08-2021-0055
Fei Chong Ng, A. Abas, M. N. Nashrudin, M. Y. Tura Ali
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引用次数: 0

摘要

目的研究倒装芯片封装过程中下充填体流动和空隙形成的充填过程。解析地建立了一个新的充填进度参数,即充填体积分数与充填位移的关系。还引入了充填效率的另一个指示参数来量化充填过程中的空隙率。此外,在以往试验的基础上,对不同倒装芯片上的下填过程进行了数值模拟。研究结果所有的研究结果都与过去的实验结果相一致,包括定量的填充过程和定性的流动曲线。填充体积分数随填充位移单调增加,填充时间也随之单调增加。随着下充液的推进,空腔尺寸减小,充填效率提高。下填流阶段形成的空洞是由凸起入口接触线加速跳变引起的。实际意义填充过程使制造商能够预测下填充流锋,因为它通过倒装芯片推进。此外,充填进度和充填效率可以为确定任何充填阶段的孔隙形成提供定量信息。空化形成机制使对策得以及时制定。独创性/价值填充进度和填充效率是在考虑不完全填充和空隙等可靠性缺陷的情况下,量化填充过程性能的新的指示参数。
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Analytical and numerical analyses of filling progression and void formation in flip-chip underfill encapsulation process
Purpose This paper aims to study the filling progression of underfill flow and void formation during the flip-chip encapsulation process. Design/methodology/approach A new parameter of filling progression that relates volume fraction filled to filling displacement was formulated analytically. Another indicative parameter of filling efficiency was also introduced to quantify the voiding fraction in filling progression. Additionally, the underfill process on different flip-chips based on the past experiments was numerically simulated. Findings All findings were well-validated with reference to the past experimental results, in terms of quantitative filling progression and qualitative flow profiles. The volume fraction filled increases monotonically with the filling displacement and thus the filling time. As the underfill fluid advances, the size of the void decreases while the filling efficiency increases. Furthermore, the void formed during the underfilling flow stage was caused by the accelerated contact line jump at the bump entrance. Practical implications The filling progression enabled manufacturers to forecast the underfill flow front, as it advances through the flip-chip. Moreover, filling progression and filling efficiency could provide quantitative insights for the determination of void formations at any filling stages. The voiding formation mechanism enables the prompt formulation of countermeasures. Originality/value Both the filling progression and filling efficiency are new indicative parameters in quantifying the performance of the filling process while considering the reliability defects such as incomplete filling and voiding.
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来源期刊
Soldering & Surface Mount Technology
Soldering & Surface Mount Technology 工程技术-材料科学:综合
CiteScore
4.10
自引率
15.00%
发文量
30
审稿时长
>12 weeks
期刊介绍: Soldering & Surface Mount Technology seeks to make an important contribution to the advancement of research and application within the technical body of knowledge and expertise in this vital area. Soldering & Surface Mount Technology compliments its sister publications; Circuit World and Microelectronics International. The journal covers all aspects of SMT from alloys, pastes and fluxes, to reliability and environmental effects, and is currently providing an important dissemination route for new knowledge on lead-free solders and processes. The journal comprises a multidisciplinary study of the key materials and technologies used to assemble state of the art functional electronic devices. The key focus is on assembling devices and interconnecting components via soldering, whilst also embracing a broad range of related approaches.
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