{"title":"运行时可重新配置的纳米磁逻辑门和使用非常高磁导率材料的比较器设计","authors":"Vineet Jaiswal, Trailokya Nath Sasamal","doi":"10.1007/s10825-023-02105-w","DOIUrl":null,"url":null,"abstract":"<div><p> Nanomagnetic logic is a recent technology used in electronic devices and systems. The current challenge in circuit miniaturization has prompted a move away from the traditional metal-oxide-semiconductor technology. Nanomagnetic logic-based devices have no leakage current, and they are also non-volatile. In this paper, we propose run-time reconfigurable layout designs for the logic gates, and to show the applicability of the logic gates, we implement a single-bit comparator design. For the logic gate designs, we use slant-edge nanomagnets of different shapes as inputs. The proposed layout designs are verified using the <i>MuMax3</i> micro-magnetic simulation tool, and results are compared with a previous approach. The implementation of a single-bit comparator design can significantly reduce the number of nanodots required, typically by <span>\\(\\sim\\)</span>50–80%, as well as the area occupancy, which can be reduced by <span>\\(\\sim\\)</span>56–99%.</p></div>","PeriodicalId":620,"journal":{"name":"Journal of Computational Electronics","volume":null,"pages":null},"PeriodicalIF":2.2000,"publicationDate":"2023-10-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Run-time reconfigurable nanomagnetic logic gates and comparator designs using very high-permeability material\",\"authors\":\"Vineet Jaiswal, Trailokya Nath Sasamal\",\"doi\":\"10.1007/s10825-023-02105-w\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p> Nanomagnetic logic is a recent technology used in electronic devices and systems. The current challenge in circuit miniaturization has prompted a move away from the traditional metal-oxide-semiconductor technology. Nanomagnetic logic-based devices have no leakage current, and they are also non-volatile. In this paper, we propose run-time reconfigurable layout designs for the logic gates, and to show the applicability of the logic gates, we implement a single-bit comparator design. For the logic gate designs, we use slant-edge nanomagnets of different shapes as inputs. The proposed layout designs are verified using the <i>MuMax3</i> micro-magnetic simulation tool, and results are compared with a previous approach. The implementation of a single-bit comparator design can significantly reduce the number of nanodots required, typically by <span>\\\\(\\\\sim\\\\)</span>50–80%, as well as the area occupancy, which can be reduced by <span>\\\\(\\\\sim\\\\)</span>56–99%.</p></div>\",\"PeriodicalId\":620,\"journal\":{\"name\":\"Journal of Computational Electronics\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":2.2000,\"publicationDate\":\"2023-10-20\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Journal of Computational Electronics\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://link.springer.com/article/10.1007/s10825-023-02105-w\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Computational Electronics","FirstCategoryId":"5","ListUrlMain":"https://link.springer.com/article/10.1007/s10825-023-02105-w","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Run-time reconfigurable nanomagnetic logic gates and comparator designs using very high-permeability material
Nanomagnetic logic is a recent technology used in electronic devices and systems. The current challenge in circuit miniaturization has prompted a move away from the traditional metal-oxide-semiconductor technology. Nanomagnetic logic-based devices have no leakage current, and they are also non-volatile. In this paper, we propose run-time reconfigurable layout designs for the logic gates, and to show the applicability of the logic gates, we implement a single-bit comparator design. For the logic gate designs, we use slant-edge nanomagnets of different shapes as inputs. The proposed layout designs are verified using the MuMax3 micro-magnetic simulation tool, and results are compared with a previous approach. The implementation of a single-bit comparator design can significantly reduce the number of nanodots required, typically by \(\sim\)50–80%, as well as the area occupancy, which can be reduced by \(\sim\)56–99%.
期刊介绍:
he Journal of Computational Electronics brings together research on all aspects of modeling and simulation of modern electronics. This includes optical, electronic, mechanical, and quantum mechanical aspects, as well as research on the underlying mathematical algorithms and computational details. The related areas of energy conversion/storage and of molecular and biological systems, in which the thrust is on the charge transport, electronic, mechanical, and optical properties, are also covered.
In particular, we encourage manuscripts dealing with device simulation; with optical and optoelectronic systems and photonics; with energy storage (e.g. batteries, fuel cells) and harvesting (e.g. photovoltaic), with simulation of circuits, VLSI layout, logic and architecture (based on, for example, CMOS devices, quantum-cellular automata, QBITs, or single-electron transistors); with electromagnetic simulations (such as microwave electronics and components); or with molecular and biological systems. However, in all these cases, the submitted manuscripts should explicitly address the electronic properties of the relevant systems, materials, or devices and/or present novel contributions to the physical models, computational strategies, or numerical algorithms.