O. Kwon, Ki-Nam Park, Do-Young Lee, Kang-Jin Lee, S. Jun, Chan-Ki Kim, W. Yang
{"title":"一种用于高质量640/spl倍/480 CMOS成像系统的新型双斜率模数转换器","authors":"O. Kwon, Ki-Nam Park, Do-Young Lee, Kang-Jin Lee, S. Jun, Chan-Ki Kim, W. Yang","doi":"10.1109/ICVC.1999.820923","DOIUrl":null,"url":null,"abstract":"In this paper, a novel double slope ADC (Analog-to-Digital Converter) for imaging applications is proposed. With this conversion technique, the resolution of images can be increased especially for low illumination environments while maintaining wide dynamic range. The proposed double slope ADC is implemented with a parallel bank of 640 pseudo-l0b ADCs in a 3.3 V single chip digital CMOS image sensor with 640/spl times/480 (VGA) pixel array, 3.04 kB DRAM line buffer, and digital control block using a 0.5 /spl mu/m single poly, triple metal DRAM baseline.","PeriodicalId":13415,"journal":{"name":"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)","volume":"29 1","pages":"335-338"},"PeriodicalIF":0.0000,"publicationDate":"1999-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"A novel double slope analog-to-digital converter for a high-quality 640/spl times/480 CMOS imaging system\",\"authors\":\"O. Kwon, Ki-Nam Park, Do-Young Lee, Kang-Jin Lee, S. Jun, Chan-Ki Kim, W. Yang\",\"doi\":\"10.1109/ICVC.1999.820923\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a novel double slope ADC (Analog-to-Digital Converter) for imaging applications is proposed. With this conversion technique, the resolution of images can be increased especially for low illumination environments while maintaining wide dynamic range. The proposed double slope ADC is implemented with a parallel bank of 640 pseudo-l0b ADCs in a 3.3 V single chip digital CMOS image sensor with 640/spl times/480 (VGA) pixel array, 3.04 kB DRAM line buffer, and digital control block using a 0.5 /spl mu/m single poly, triple metal DRAM baseline.\",\"PeriodicalId\":13415,\"journal\":{\"name\":\"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)\",\"volume\":\"29 1\",\"pages\":\"335-338\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-10-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICVC.1999.820923\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICVC.1999.820923","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A novel double slope analog-to-digital converter for a high-quality 640/spl times/480 CMOS imaging system
In this paper, a novel double slope ADC (Analog-to-Digital Converter) for imaging applications is proposed. With this conversion technique, the resolution of images can be increased especially for low illumination environments while maintaining wide dynamic range. The proposed double slope ADC is implemented with a parallel bank of 640 pseudo-l0b ADCs in a 3.3 V single chip digital CMOS image sensor with 640/spl times/480 (VGA) pixel array, 3.04 kB DRAM line buffer, and digital control block using a 0.5 /spl mu/m single poly, triple metal DRAM baseline.
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