Jong-Hyup Lee, Byoung-Ho Kwon, Se-Young Lee, Hee-Jeen Kim, Young-Gyoon Ryu, Seongsoo Kweon, Jeong-Gun Lee
{"title":"0.25 /spl mu/m逻辑器件的wcmp评价","authors":"Jong-Hyup Lee, Byoung-Ho Kwon, Se-Young Lee, Hee-Jeen Kim, Young-Gyoon Ryu, Seongsoo Kweon, Jeong-Gun Lee","doi":"10.1109/ICVC.1999.820969","DOIUrl":null,"url":null,"abstract":"The purpose of this study is to report polishing characteristics of W CMP with combination sets of slurry and pad in 0.25 um logic technology. W etch back process is compared with W CMP process in view of electrical performance in the 0.25 /spl mu/m logic device. The proper selection of consumables is important to the successful application of W CMP. The W CMP process should be carefully controlled to be implemented in the back-end process of sub-quarter micron logic device.","PeriodicalId":13415,"journal":{"name":"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)","volume":"61 1","pages":"466-468"},"PeriodicalIF":0.0000,"publicationDate":"1999-10-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"W CMP evaluation for 0.25 /spl mu/m logic device\",\"authors\":\"Jong-Hyup Lee, Byoung-Ho Kwon, Se-Young Lee, Hee-Jeen Kim, Young-Gyoon Ryu, Seongsoo Kweon, Jeong-Gun Lee\",\"doi\":\"10.1109/ICVC.1999.820969\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The purpose of this study is to report polishing characteristics of W CMP with combination sets of slurry and pad in 0.25 um logic technology. W etch back process is compared with W CMP process in view of electrical performance in the 0.25 /spl mu/m logic device. The proper selection of consumables is important to the successful application of W CMP. The W CMP process should be carefully controlled to be implemented in the back-end process of sub-quarter micron logic device.\",\"PeriodicalId\":13415,\"journal\":{\"name\":\"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)\",\"volume\":\"61 1\",\"pages\":\"466-468\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-10-26\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICVC.1999.820969\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICVC.1999.820969","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The purpose of this study is to report polishing characteristics of W CMP with combination sets of slurry and pad in 0.25 um logic technology. W etch back process is compared with W CMP process in view of electrical performance in the 0.25 /spl mu/m logic device. The proper selection of consumables is important to the successful application of W CMP. The W CMP process should be carefully controlled to be implemented in the back-end process of sub-quarter micron logic device.