用于光刻在制品管理的动态部署建模工具

D. Williams, D. Favero
{"title":"用于光刻在制品管理的动态部署建模工具","authors":"D. Williams, D. Favero","doi":"10.1109/ASMC.2002.1001574","DOIUrl":null,"url":null,"abstract":"In semiconductor manufacturing, according to Marcoux et al. (1999) tool deployment has been identified as a key factor driving capacity loss and lower operational efficiency. In most cases, the losses are uncovered by analysis of Cycle Time data and investigation of specific tool performance. For the photolithography sector, this feedback approach often highlights problems after they may have already past or have been fixed. This paper will discuss a feed forward model for managing deployment of a large fleet of photolithography tools. This model predicts tool loading using existing tool planning parameters, actual and forecast wafer start data and extensive turn-around-time matrices. The model provides a portable tool with immediate readout of various loading scenarios. The deployment decision process makes use of these simulations. The model output comes in the form of graphs and tables that can summarize load by tool, tool groups, resist groups, technologies, and levels at various time slices. The output identifies where tool qualifications or additional resists may be needed, and deployment adjustments for WIP balance is warranted. These changes prevent operational efficiency loss and maintain cycle time performance.","PeriodicalId":64779,"journal":{"name":"半导体技术","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Dynamic deployment modeling tool for photolithography WIP management\",\"authors\":\"D. Williams, D. Favero\",\"doi\":\"10.1109/ASMC.2002.1001574\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In semiconductor manufacturing, according to Marcoux et al. (1999) tool deployment has been identified as a key factor driving capacity loss and lower operational efficiency. In most cases, the losses are uncovered by analysis of Cycle Time data and investigation of specific tool performance. For the photolithography sector, this feedback approach often highlights problems after they may have already past or have been fixed. This paper will discuss a feed forward model for managing deployment of a large fleet of photolithography tools. This model predicts tool loading using existing tool planning parameters, actual and forecast wafer start data and extensive turn-around-time matrices. The model provides a portable tool with immediate readout of various loading scenarios. The deployment decision process makes use of these simulations. The model output comes in the form of graphs and tables that can summarize load by tool, tool groups, resist groups, technologies, and levels at various time slices. The output identifies where tool qualifications or additional resists may be needed, and deployment adjustments for WIP balance is warranted. These changes prevent operational efficiency loss and maintain cycle time performance.\",\"PeriodicalId\":64779,\"journal\":{\"name\":\"半导体技术\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"半导体技术\",\"FirstCategoryId\":\"1087\",\"ListUrlMain\":\"https://doi.org/10.1109/ASMC.2002.1001574\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"半导体技术","FirstCategoryId":"1087","ListUrlMain":"https://doi.org/10.1109/ASMC.2002.1001574","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

摘要

根据Marcoux等人(1999)的研究,在半导体制造业中,工具部署已被确定为导致产能损失和操作效率降低的关键因素。在大多数情况下,通过对Cycle Time数据的分析和对特定工具性能的调查,可以发现损失。对于光刻行业,这种反馈方法通常会在问题已经过去或已经修复后突出问题。本文将讨论用于管理大量光刻工具部署的前馈模型。该模型使用现有的刀具规划参数、实际和预测的晶圆启动数据以及广泛的周转时间矩阵来预测刀具负载。该模型提供了一个便携式工具,可立即读出各种加载场景。部署决策过程利用了这些模拟。模型输出以图形和表格的形式出现,可以按工具、工具组、抵制组、技术和不同时间段的级别总结负载。输出确定了可能需要工具资格或附加阻力的地方,并且保证了在制品平衡的部署调整。这些变化防止了操作效率的损失,并保持了周期时间的性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Dynamic deployment modeling tool for photolithography WIP management
In semiconductor manufacturing, according to Marcoux et al. (1999) tool deployment has been identified as a key factor driving capacity loss and lower operational efficiency. In most cases, the losses are uncovered by analysis of Cycle Time data and investigation of specific tool performance. For the photolithography sector, this feedback approach often highlights problems after they may have already past or have been fixed. This paper will discuss a feed forward model for managing deployment of a large fleet of photolithography tools. This model predicts tool loading using existing tool planning parameters, actual and forecast wafer start data and extensive turn-around-time matrices. The model provides a portable tool with immediate readout of various loading scenarios. The deployment decision process makes use of these simulations. The model output comes in the form of graphs and tables that can summarize load by tool, tool groups, resist groups, technologies, and levels at various time slices. The output identifies where tool qualifications or additional resists may be needed, and deployment adjustments for WIP balance is warranted. These changes prevent operational efficiency loss and maintain cycle time performance.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
8436
期刊最新文献
A manufacturable shallow trench isolation process for sub-0.2 um DRAM technologies Ultra-dilute silicon wafer clean chemistry for fabrication of RF microwave devices Planarization yield limiters for wafer-scale 3D ICs Statistical modeling and analysis of wafer test fail counts An approach for improving yield with intentional defects
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1