R. M. Iraei, P. Bonhomme, N. Kani, S. Manipatruni, D. Nikonov, I. Young, A. Naeemi
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Impact of dimensional scaling and size effects on beyond CMOS All-Spin Logic interconnects
The energy-per-bit and delay of All-Spin Logic (ASL) interconnects have been modeled. Both Al and Cu interconnect channels have been considered and the impact of size effects and dimensional scaling on their potential performance has been quantified. It is predicted that size effects will affect ASL interconnects more severely than electrical interconnects.
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