带Ti或TiN封盖的CoSi/sub /结漏及带堆叠电容的嵌入式DRAM器件特性

ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361) Pub Date : 1999-10-26 DOI:10.1109/ICVC.1999.820878

Jong-Rim Lee, Soo-Mi Lee, Jong-Chae Kim, Wook H. Lee, Won-suk Yang, Sang-Don Lee

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摘要

本文介绍了用于实现嵌入式DRAM和逻辑(EDL)的CoSi/sub /结的特性。在EDL的高热过程中，TiN封盖比Ti封盖表现出更好的结漏和器件特性。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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CoSi/sub 2/ junction leakage with Ti or TiN capping, and device characteristics in embedded DRAM with stack capacitor

This paper presents the properties for CoSi/sub 2/ junction used to realize embedded DRAM and logic (EDL). In high thermal processes for EDL, TiN capping shows considerably better junction leakage and device characteristics than Ti capping.

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ICVC '99. 6th International Conference on VLSI and CAD (Cat. No.99EX361)

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