Myoung-Kyu Park, H. Lee, M. Jang, Jun-Hyeok Choi, D. Kang, J. Hwang
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Accurate evaluation of gate delay for low-power and high-density 0.18 /spl mu/m CMOSFET technology
The gate delay of ring oscillators in high V/sub T/ CMOSFET technology is characterized with respect to various channel widths (0.72 /spl mu/m-10 /spl mu/m). An expression for gate delay including the channel-width independent capacitance components is derived and compared with experimental results. Substantial increase of gate delay in the narrow channel width region is found due to channel width independent capacitance components which are inherent to transistors. Although the channel width independent capacitance is negligible in wide channel width, gate delay of narrow channel width (/spl les/1 /spl mu/m) ring oscillator increased more than 20% compared with 5 /spl mu/m channel width ring oscillator.