铝金属蚀刻工艺抗蚀剂配方的优化

E.G. Mammo, N. Singh, C. Mananquil, D. R. Myers
{"title":"铝金属蚀刻工艺抗蚀剂配方的优化","authors":"E.G. Mammo, N. Singh, C. Mananquil, D. R. Myers","doi":"10.1109/ASMC.2002.1001637","DOIUrl":null,"url":null,"abstract":"This paper discusses experimental results used to develop an optimized resist strip process for an Advanced Strip and Passivation (ASP+) chamber on Applied Materials Decoupled Plasma Source (DPS) 5200 metal etch platform. The scope of the experiment is to develop a resist strip process on a new ASIC BiCMOS product. To meet tight capacity schedule, the resist removal process must be relatively short. This experiment does not look for the shortest strip time, but considered various gas flow, passivation, and strip sequences to keep the resist strip time well below the total metal etch time. A design of experiment (DOE) was run to measure the response of key recipe parameters. The parameters evaluated were strip time, passivation time, passivation and strip sequence, CF/sub 4/ flow, and temperature. The response was the amount of residual resist remaining after the strip process is completed. The result showed that temperature was the major factor in effective resist removal followed by CF/sub 4/ flow and passivation/strip sequence. A second DOE was run to verify the results and lower margin. Based on the results of the DOE, a robust strip recipe was designed and implemented in manufacturing for all metal etch processes. The new process is shorter than the metal etch process, and does not affect the throughput of the system. Also, no residual resist is found since the new recipe and post-strip inspection procedure was implemented.","PeriodicalId":64779,"journal":{"name":"半导体技术","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Optimization of resist strip recipe for aluminum metal etch processes\",\"authors\":\"E.G. Mammo, N. Singh, C. Mananquil, D. R. Myers\",\"doi\":\"10.1109/ASMC.2002.1001637\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper discusses experimental results used to develop an optimized resist strip process for an Advanced Strip and Passivation (ASP+) chamber on Applied Materials Decoupled Plasma Source (DPS) 5200 metal etch platform. The scope of the experiment is to develop a resist strip process on a new ASIC BiCMOS product. To meet tight capacity schedule, the resist removal process must be relatively short. This experiment does not look for the shortest strip time, but considered various gas flow, passivation, and strip sequences to keep the resist strip time well below the total metal etch time. A design of experiment (DOE) was run to measure the response of key recipe parameters. The parameters evaluated were strip time, passivation time, passivation and strip sequence, CF/sub 4/ flow, and temperature. The response was the amount of residual resist remaining after the strip process is completed. The result showed that temperature was the major factor in effective resist removal followed by CF/sub 4/ flow and passivation/strip sequence. A second DOE was run to verify the results and lower margin. Based on the results of the DOE, a robust strip recipe was designed and implemented in manufacturing for all metal etch processes. The new process is shorter than the metal etch process, and does not affect the throughput of the system. Also, no residual resist is found since the new recipe and post-strip inspection procedure was implemented.\",\"PeriodicalId\":64779,\"journal\":{\"name\":\"半导体技术\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"半导体技术\",\"FirstCategoryId\":\"1087\",\"ListUrlMain\":\"https://doi.org/10.1109/ASMC.2002.1001637\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"半导体技术","FirstCategoryId":"1087","ListUrlMain":"https://doi.org/10.1109/ASMC.2002.1001637","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

本文讨论了应用材料去耦等离子体源(DPS) 5200金属蚀刻平台上先进带钝化(ASP+)腔的抗蚀带优化工艺的实验结果。实验的范围是在一种新的ASIC BiCMOS产品上开发抗蚀条工艺。为了满足紧张的产能计划,抗蚀剂去除过程必须相对较短。本实验并不寻找最短的条带时间,而是考虑了各种气体流量,钝化和条带顺序,以保持抗蚀条带时间远低于总金属蚀刻时间。通过实验设计(DOE)测量了关键配方参数的响应。评价的参数有条带时间、钝化时间、钝化条带顺序、CF/sub - 4/流量和温度。响应量为带钢工艺完成后剩余的残余抗蚀剂量。结果表明,温度是影响抗蚀剂有效去除的主要因素,其次是CF/sub - 4/流动和钝化/条带顺序。第二个DOE运行以验证结果和较低的余量。基于DOE的结果,设计并实施了适用于所有金属蚀刻工艺的稳健带配方。新工艺比金属蚀刻工艺时间短,且不影响系统的吞吐量。此外,由于实施了新配方和条形检验程序,没有发现残留抗蚀剂。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Optimization of resist strip recipe for aluminum metal etch processes
This paper discusses experimental results used to develop an optimized resist strip process for an Advanced Strip and Passivation (ASP+) chamber on Applied Materials Decoupled Plasma Source (DPS) 5200 metal etch platform. The scope of the experiment is to develop a resist strip process on a new ASIC BiCMOS product. To meet tight capacity schedule, the resist removal process must be relatively short. This experiment does not look for the shortest strip time, but considered various gas flow, passivation, and strip sequences to keep the resist strip time well below the total metal etch time. A design of experiment (DOE) was run to measure the response of key recipe parameters. The parameters evaluated were strip time, passivation time, passivation and strip sequence, CF/sub 4/ flow, and temperature. The response was the amount of residual resist remaining after the strip process is completed. The result showed that temperature was the major factor in effective resist removal followed by CF/sub 4/ flow and passivation/strip sequence. A second DOE was run to verify the results and lower margin. Based on the results of the DOE, a robust strip recipe was designed and implemented in manufacturing for all metal etch processes. The new process is shorter than the metal etch process, and does not affect the throughput of the system. Also, no residual resist is found since the new recipe and post-strip inspection procedure was implemented.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
8436
期刊最新文献
A manufacturable shallow trench isolation process for sub-0.2 um DRAM technologies Ultra-dilute silicon wafer clean chemistry for fabrication of RF microwave devices Planarization yield limiters for wafer-scale 3D ICs Statistical modeling and analysis of wafer test fail counts An approach for improving yield with intentional defects
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1