A high-speed boundary search Shmoo plot for ULSI memories

M. Hamada, M. Kumanoya, M. Ishii, T. Kawagoe, M. Niiro
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引用次数: 5

Abstract

The authors describe a new high-speed Shmoo plot algorithm for ULSI memory devices. The proposed boundary search method is 8 times faster than the conventional (linear searching) method. Using this method the evaluation time of a 64 Mbit memory is reduced to 2.5 hours from the 20 hours of the conventional method.<>
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用于ULSI存储器的高速边界搜索Shmoo图
作者描述了一种新的用于ULSI存储器件的高速Shmoo绘图算法。提出的边界搜索方法比传统的(线性搜索)方法快8倍。采用该方法可将64mbit存储器的评估时间从传统方法的20小时缩短到2.5小时。
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Modeling of faulty behavior of ECL storage elements Functional testing of RAMs by random testing simulation Dynamic reconfiguration schemes for mega bit BiCMOS SRAMs A high-speed boundary search Shmoo plot for ULSI memories Effective tests for memories based on faults models for low PPM defects
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