3D Integration Technologies for the Stacked CMOS Image Sensors

Abstract

In this paper our 3D chip stacking technologies for CMOS image sensors (CISs) are introduced. We have developed wafer-to-wafer bonding technology for back-illuminated CIS (BICIS) and have developed Through-Silicon-Via (TSV) technology and Cu-Cu direct bonding technology for stacked BI-CIS. Our 3D chip stacking technologies have successfully realized the multifunctional, high-performance and highly productive CIS devices. Such innovative technologies are expected to evolve not only the CIS devices but also the general 3D stacked semiconductor devices.