An 85.6-dB SNDR 1.5 MHz-BW NS-pipelined SAR ADC employing the gain-error-shaping technique to enhance the ADC linearity

Abstract

This paper presents a noise-shaping (NS) pipelined SAR ADC. For a pipelined-SAR ADC, Gain-error-shaping (GES) techniques executing its function in the digital domain can calibrate and correct amplifier gains, reducing nonlinearity errors introduced by amplifiers and thereby improving the ADC performance. Thanks to the highly digitized structure of SAR ADC, NS-pipelined SAR ADC based on the GES is a promising research direction.

In a 0.18 μm CMOS process, the proposed ADC achieves a SNDR of 82.57 dB, with the signal bandwidth and the sampling rate being 1.5 MHz and 25 MHz respectively. It consumes 3.37 mW in total at a 1.8-V supply, resulting in a SNDR-based Schreier figure-of-merit (FoMs) of 179.1 dB. The chip area occupied by the ADC core is 1200μm × 800 μm.