D. Velenis, J. D. Vos, Soon-Wook Kim, J. Derakhshandeh, P. Bex, G. Capuz, S. Suhard, K. Rebibis, S. V. Huylenbroeck, E. Marinissen, A. Phommahaxay, Andy Miller, G. Beyer, G. V. D. Plas, E. Beyne
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Process Complexity and Cost Considerations of Multi-Layer Die Stacks
The increased requirements of data processing and reduced data latency has driven the demand for multi-layer 3D stacks for high performance systems and memory applications. In this paper, different approaches for multi-layer stacking are considered, including wafer-to-wafer (W2W) and die-to-die (D2D) stacking. The complexity of each approach is evaluated in terms of manufacturing cost and its impact on the stacked-system yield.