堆叠式CMOS图像传感器的3D集成技术

2019 International 3D Systems Integration Conference (3DIC) Pub Date : 2019-10-01 DOI:10.1109/3DIC48104.2019.9058895

Y. Kagawa, H. Iwamoto

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引用次数: 7

摘要

本文介绍了CMOS图像传感器(CISs)的三维芯片堆叠技术。我们已经开发了用于背光CIS (BICIS)的晶圆间键合技术，并开发了用于堆叠BI-CIS的through silicon - via (TSV)技术和Cu-Cu直接键合技术。我们的3D芯片堆叠技术成功地实现了多功能、高性能和高生产率的CIS器件。预计这些创新技术不仅会发展CIS器件，还会发展一般的3D堆叠半导体器件。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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3D Integration Technologies for the Stacked CMOS Image Sensors

In this paper our 3D chip stacking technologies for CMOS image sensors (CISs) are introduced. We have developed wafer-to-wafer bonding technology for back-illuminated CIS (BICIS) and have developed Through-Silicon-Via (TSV) technology and Cu-Cu direct bonding technology for stacked BI-CIS. Our 3D chip stacking technologies have successfully realized the multifunctional, high-performance and highly productive CIS devices. Such innovative technologies are expected to evolve not only the CIS devices but also the general 3D stacked semiconductor devices.

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2019 International 3D Systems Integration Conference (3DIC)

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