{"title":"变异容差的统计设计:延续摩尔定律的关键","authors":"T. Karnik, Vivek De, S. Borkar, T. Karnik","doi":"10.1109/ICICDT.2004.1309939","DOIUrl":null,"url":null,"abstract":"Future high performance microprocessor design with technology scaling beyond 90nm will face a major challenge - parameter variations. Design practice will have to change from deterministic design to statistical design for variation tolerance. This paper discusses process, voltage and temperature variations, and their impact on circuits and microarchitecture. Possible solutions to reduce the impact of parameter variations on digital and analog circuits, and to achieve higher target frequencies are also presented.","PeriodicalId":158994,"journal":{"name":"2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-10-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"31","resultStr":"{\"title\":\"Statistical design for variation tolerance: key to continued Moore's law\",\"authors\":\"T. Karnik, Vivek De, S. Borkar, T. Karnik\",\"doi\":\"10.1109/ICICDT.2004.1309939\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Future high performance microprocessor design with technology scaling beyond 90nm will face a major challenge - parameter variations. Design practice will have to change from deterministic design to statistical design for variation tolerance. This paper discusses process, voltage and temperature variations, and their impact on circuits and microarchitecture. Possible solutions to reduce the impact of parameter variations on digital and analog circuits, and to achieve higher target frequencies are also presented.\",\"PeriodicalId\":158994,\"journal\":{\"name\":\"2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866)\",\"volume\":\"62 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-10-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"31\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICICDT.2004.1309939\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 International Conference on Integrated Circuit Design and Technology (IEEE Cat. No.04EX866)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICICDT.2004.1309939","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Statistical design for variation tolerance: key to continued Moore's law
Future high performance microprocessor design with technology scaling beyond 90nm will face a major challenge - parameter variations. Design practice will have to change from deterministic design to statistical design for variation tolerance. This paper discusses process, voltage and temperature variations, and their impact on circuits and microarchitecture. Possible solutions to reduce the impact of parameter variations on digital and analog circuits, and to achieve higher target frequencies are also presented.