{"title":"一种定位dram故障的最佳行军测试方法","authors":"Lin. Shen, B. Cockburn","doi":"10.1109/MT.1993.263148","DOIUrl":null,"url":null,"abstract":"The authors solve the fault location problem for a realistic fault model that is based on the physical defects and resulting faulty behaviours observed in 4 Mbit DRAMs manufactured by Siemens. Assuming an n*1 DRAM organization, they derive a lower bound of 8n on the length of any march test that locates all of the faults in the fault model. They then propose a march test whose length matches the lower bound, and then show that this test has 100% fault coverage.<<ETX>>","PeriodicalId":248811,"journal":{"name":"Records of the 1993 IEEE International Workshop on Memory Testing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-08-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":"{\"title\":\"An optimal march test for locating faults in DRAMs\",\"authors\":\"Lin. Shen, B. Cockburn\",\"doi\":\"10.1109/MT.1993.263148\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The authors solve the fault location problem for a realistic fault model that is based on the physical defects and resulting faulty behaviours observed in 4 Mbit DRAMs manufactured by Siemens. Assuming an n*1 DRAM organization, they derive a lower bound of 8n on the length of any march test that locates all of the faults in the fault model. They then propose a march test whose length matches the lower bound, and then show that this test has 100% fault coverage.<<ETX>>\",\"PeriodicalId\":248811,\"journal\":{\"name\":\"Records of the 1993 IEEE International Workshop on Memory Testing\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-08-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"19\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Records of the 1993 IEEE International Workshop on Memory Testing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MT.1993.263148\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Records of the 1993 IEEE International Workshop on Memory Testing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MT.1993.263148","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An optimal march test for locating faults in DRAMs
The authors solve the fault location problem for a realistic fault model that is based on the physical defects and resulting faulty behaviours observed in 4 Mbit DRAMs manufactured by Siemens. Assuming an n*1 DRAM organization, they derive a lower bound of 8n on the length of any march test that locates all of the faults in the fault model. They then propose a march test whose length matches the lower bound, and then show that this test has 100% fault coverage.<>