Pub Date : 2014-12-10DOI: 10.1109/EmbeddedCom-ScalCom.2009.128
Dong Zhaoyu, Gao Bing, Zhao Yinliang, Song Shaolong, Du Yanning
Speculative multi-threading (SpMT) has been proposed as a perspective method to exploit Chip Multiprocessors (CMP) hardware potential. It is a thread level speculation (TLS) model mainly depending on software and hardware co-design. This paper researches speculative thread-level parallelism of general purpose programs and a speculative multi-threading execution model called Prophet is presented. The architectural support for Prophet execution model is designed based on CMP. In Prophet the inter-thread data dependency are predicted by pre-computation slice (p-slice) to reduce RAW violation. Prophet multi-versioning Cache system along with thread state control mechanism in architectural support are utilized for buffering the speculative data, and a snooping bus based cache coherence protocol is used to detect data dependence violation. The simulation-based evaluation shows that the Prophet system could achieve significant speedup for general-purpose programs.
{"title":"Prophet: A Speculative Multi-threading Execution Model with Architectural Support Based on CMP","authors":"Dong Zhaoyu, Gao Bing, Zhao Yinliang, Song Shaolong, Du Yanning","doi":"10.1109/EmbeddedCom-ScalCom.2009.128","DOIUrl":"https://doi.org/10.1109/EmbeddedCom-ScalCom.2009.128","url":null,"abstract":"Speculative multi-threading (SpMT) has been proposed as a perspective method to exploit Chip Multiprocessors (CMP) hardware potential. It is a thread level speculation (TLS) model mainly depending on software and hardware co-design. This paper researches speculative thread-level parallelism of general purpose programs and a speculative multi-threading execution model called Prophet is presented. The architectural support for Prophet execution model is designed based on CMP. In Prophet the inter-thread data dependency are predicted by pre-computation slice (p-slice) to reduce RAW violation. Prophet multi-versioning Cache system along with thread state control mechanism in architectural support are utilized for buffering the speculative data, and a snooping bus based cache coherence protocol is used to detect data dependence violation. The simulation-based evaluation shows that the Prophet system could achieve significant speedup for general-purpose programs.","PeriodicalId":110844,"journal":{"name":"arXiv: Hardware Architecture","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128073468","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}