Pub Date : 2002-06-30DOI: 10.1007/978-1-4615-1113-7
K. Chakrabarty, V. Iyengar, A. Chandra
{"title":"Test Resource Partitioning for System-on-a-Chip","authors":"K. Chakrabarty, V. Iyengar, A. Chandra","doi":"10.1007/978-1-4615-1113-7","DOIUrl":"https://doi.org/10.1007/978-1-4615-1113-7","url":null,"abstract":"","PeriodicalId":142737,"journal":{"name":"Frontiers in Electronic Testing","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2002-06-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127886060","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1997-06-30DOI: 10.1007/978-1-4757-2572-8
W. Kunz, D. Stoffel
{"title":"Reasoning in Boolean Networks - Logic Synthesis and Verification Using Testing Techniques","authors":"W. Kunz, D. Stoffel","doi":"10.1007/978-1-4757-2572-8","DOIUrl":"https://doi.org/10.1007/978-1-4757-2572-8","url":null,"abstract":"","PeriodicalId":142737,"journal":{"name":"Frontiers in Electronic Testing","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1997-06-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122081754","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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