Pub Date : 1992-11-03DOI: 10.7551/mitpress/5299.001.0001
A. Dan
A data sharing environment consists of multiple loosely coupled transaction processing nodes sharing a common database at the disk level. Apart from the private buffers in each node, the environment may contain an additional global shared buffer in the form of disk cache, file server cache or intermediate shared memory. In this dissertation, we develop a comprehensive analytical model for such a complex environment using a hierarchical approach, where the concurrency control, the CPU queueing discipline and the buffer hit probabilities of the private and shared buffers are first modeled separately, and then integrated through an iterative procedure. To this end, we develop two new submodels: (1) the private buffer model that captures the effects of multi-system buffer invalidation, skewed database access, LRU buffer replacement policy and the rerun transactions, and (2) the shared buffer modeling framework that captures the effects of dependence between the contents of private and the shared buffers, and is used to analyze various shared buffer management policies (SBMPs) proposed in this dissertation. The various policies propagate a granule into the shared buffer after one or more of the following events: database update, shared buffer miss and private buffer replacement. The analytical model is then used to investigate various issues in the design of data sharing environment. Scalability. The model predicts degradation in transaction response time as new nodes are added to the system. Buffer utilization. The model predicts the effectiveness of additional buffer allocation for both the private and shared buffers. Skewed access. The skewed access increases both data contention and buffer hit probability in the system. The resultant effect on the transaction response time is investigated. The response time is found to be more sensitive to skewed data access under two-phase locking (2PL) than under optimistic concurrency control (OCC) protocol. The skewed access also magnifies the effect of invalidation and reduces the utilization of private buffers. Policy selection. The modeling framework is used to select the best SBMP for a given parameter range (private and shared buffer sizes, shared buffer access overhead and delay, number of nodes, database access pattern, update probabilities, etc.). The updates should always be propagated to the shared buffer to alleviate the invalidation problem. For a smaller number of nodes, the effect of dependence between the contents of the private and the shared buffers influences policy selection. Optimal configuration. The model can be used to optimally allocate the buffer between the private and the shared buffers in various system architectures depending on the overhead and delay in accessing the shared buffer. For a larger number of nodes and under skewed database access, the shared buffer can improve the transaction response time significantly.
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Pub Date : 1992-01-21DOI: 10.7551/mitpress/7052.001.0001
N. Nisan
It's not surprisingly when entering this site to get the book. One of the popular books now is the using hard problems to create pseudorandom generators. You may be confused because you can't find the book in the book store around your city. Commonly, the popular book will be sold quickly. And when you have found the store to buy the book, it will be so hurt when you run out of it. This is why, searching for this popular book in this website will give you benefit. You will not run out of this book.
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Pub Date : 1989-09-07DOI: 10.7551/mitpress/6874.001.0001
D. Dill
A theory of automatic hierarchical verification of speed-independent circuits is developed and implemented. The theory models circuits as trace structures. Trace structures represent the behaviors of circuits as sets of traces, which sequences of transitions on the circuit's input and output wires. Trace structures form a compositional semantics for circuits: two trace structures can be composed to model connecting the corresponding circuits and transitions can be hidden to model unobservable internal wires. Trace structures express requirements on the behavior of the environment in addition to describing the behavior of a circuit. It is noted that, for composition to work properly, a trace structure must model all possible actions of the environment. This property, called receptiveness, is precisely characterized. Trace structures can also be used as specifications. If one trace structure can be safely substituted for another in all contexts, the first is an implementation of the second. This relationship can be tested by using a decision procedure based on finding the most demanding environment with which a trace structure can be composed. The use of a single formalism for descriptions and specifications greatly simplifies the theory. More importantly, the resulting verification methodology is naturally hierarchical, because specifications at one level of abstraction can be used as descriptions at higher levels of abstraction. Two distinct theories are proposed: prefix-closed trace structures, which can model and specify safety properties, and complete trace structures, which can also deal with liveness and fairness properties. The theory of prefix-closed trace structures has been implemented in an interactive program which has verified and detected bugs in published circuit designs. Complete trace structures are based on regular languages of infinite sequences. The definitions and results pertaining to complete trace structures are very similar to those for prefix-closed trace structures. It is relatively difficult to define and test receptiveness for complete trace structures. The definition of this property is presented in terms of infinite two-player games. The problem of receptiveness is proved to be decidable, by reduction to Church's solvability problem.
{"title":"Trace theory for automatic hierarchical verification of speed-independent circuits","authors":"D. Dill","doi":"10.7551/mitpress/6874.001.0001","DOIUrl":"https://doi.org/10.7551/mitpress/6874.001.0001","url":null,"abstract":"A theory of automatic hierarchical verification of speed-independent circuits is developed and implemented. The theory models circuits as trace structures. Trace structures represent the behaviors of circuits as sets of traces, which sequences of transitions on the circuit's input and output wires. Trace structures form a compositional semantics for circuits: two trace structures can be composed to model connecting the corresponding circuits and transitions can be hidden to model unobservable internal wires. Trace structures express requirements on the behavior of the environment in addition to describing the behavior of a circuit. It is noted that, for composition to work properly, a trace structure must model all possible actions of the environment. This property, called receptiveness, is precisely characterized. \u0000Trace structures can also be used as specifications. If one trace structure can be safely substituted for another in all contexts, the first is an implementation of the second. This relationship can be tested by using a decision procedure based on finding the most demanding environment with which a trace structure can be composed. The use of a single formalism for descriptions and specifications greatly simplifies the theory. More importantly, the resulting verification methodology is naturally hierarchical, because specifications at one level of abstraction can be used as descriptions at higher levels of abstraction. \u0000Two distinct theories are proposed: prefix-closed trace structures, which can model and specify safety properties, and complete trace structures, which can also deal with liveness and fairness properties. The theory of prefix-closed trace structures has been implemented in an interactive program which has verified and detected bugs in published circuit designs. \u0000Complete trace structures are based on regular languages of infinite sequences. The definitions and results pertaining to complete trace structures are very similar to those for prefix-closed trace structures. It is relatively difficult to define and test receptiveness for complete trace structures. The definition of this property is presented in terms of infinite two-player games. The problem of receptiveness is proved to be decidable, by reduction to Church's solvability problem.","PeriodicalId":151524,"journal":{"name":"ACM distinguished dissertations","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1989-09-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130948110","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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