Z. Wang, M. Berroth, V. Hurm, M. Lang, P. Hofmann, A. Hulsmann, K. Kohler, B. Raynor, J. Schneider
An IC for 20 Gb/s clock recovery and data decision was realised using 0.3 ¿m gate-length QW-HEMTs. A narrow-band regenerative frequency divider with on-chip resonator filters is used for the clock recovery. The parallel processing concept is accepted for the data decision. The complex IC was tested on wafer using 5 and 10-Gb/s input data. The desired 10-GHz clock signal and regenerated data signals have been obtained. The 2×2 mm2 IC has a power consumption of about 0.5 W at ¿3 volt supply voltage.
{"title":"20 Gb/s Monolithic Integrated Clock Recovery and Data Decision","authors":"Z. Wang, M. Berroth, V. Hurm, M. Lang, P. Hofmann, A. Hulsmann, K. Kohler, B. Raynor, J. Schneider","doi":"10.18419/OPUS-8196","DOIUrl":"https://doi.org/10.18419/OPUS-8196","url":null,"abstract":"An IC for 20 Gb/s clock recovery and data decision was realised using 0.3 ¿m gate-length QW-HEMTs. A narrow-band regenerative frequency divider with on-chip resonator filters is used for the clock recovery. The parallel processing concept is accepted for the data decision. The complex IC was tested on wafer using 5 and 10-Gb/s input data. The desired 10-GHz clock signal and regenerated data signals have been obtained. The 2×2 mm2 IC has a power consumption of about 0.5 W at ¿3 volt supply voltage.","PeriodicalId":199940,"journal":{"name":"ESSCIRC '94: Twientieth European Solid-State Circuits Conference","volume":"41 1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128480961","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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