Pub Date : 2011-12-01DOI: 10.1007/978-1-4419-6911-8_2
Hiroki Matsutani, M. Koibuchi, Hiroshi Nakamura, H. Amano
{"title":"Run-Time Power-Gating Techniques for Low-Power On-Chip Networks","authors":"Hiroki Matsutani, M. Koibuchi, Hiroshi Nakamura, H. Amano","doi":"10.1007/978-1-4419-6911-8_2","DOIUrl":"https://doi.org/10.1007/978-1-4419-6911-8_2","url":null,"abstract":"","PeriodicalId":299942,"journal":{"name":"Low Power Networks-on-Chip","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131082651","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1007/978-1-4419-6911-8_6
Yuho Jin, K. H. Yum, Eun Jung Kim
{"title":"Adaptive Data Compression for Low-Power On-Chip Networks","authors":"Yuho Jin, K. H. Yum, Eun Jung Kim","doi":"10.1007/978-1-4419-6911-8_6","DOIUrl":"https://doi.org/10.1007/978-1-4419-6911-8_6","url":null,"abstract":"","PeriodicalId":299942,"journal":{"name":"Low Power Networks-on-Chip","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129084944","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1007/978-1-4419-6911-8_5
M. Palesi, Rickard Holsmark, Shashi Kumar, V. Catania
{"title":"Application-Specific Routing Algorithms for Low Power Network on Chip Design","authors":"M. Palesi, Rickard Holsmark, Shashi Kumar, V. Catania","doi":"10.1007/978-1-4419-6911-8_5","DOIUrl":"https://doi.org/10.1007/978-1-4419-6911-8_5","url":null,"abstract":"","PeriodicalId":299942,"journal":{"name":"Low Power Networks-on-Chip","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125166630","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1007/978-1-4419-6911-8_1
M. Anders, H. Kaul, R. Krishnamurthy, S. Borkar
{"title":"Hybrid Circuit/Packet Switched Network for Energy Efficient on-Chip Interconnections","authors":"M. Anders, H. Kaul, R. Krishnamurthy, S. Borkar","doi":"10.1007/978-1-4419-6911-8_1","DOIUrl":"https://doi.org/10.1007/978-1-4419-6911-8_1","url":null,"abstract":"","PeriodicalId":299942,"journal":{"name":"Low Power Networks-on-Chip","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126327135","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1007/978-1-4419-6911-8_10
S. Tam, E. Socher, Mau-Chung Frank Chang, J. Cong, Glenn D. Reinman
{"title":"RF-Interconnect for Future Network-On-Chip","authors":"S. Tam, E. Socher, Mau-Chung Frank Chang, J. Cong, Glenn D. Reinman","doi":"10.1007/978-1-4419-6911-8_10","DOIUrl":"https://doi.org/10.1007/978-1-4419-6911-8_10","url":null,"abstract":"","PeriodicalId":299942,"journal":{"name":"Low Power Networks-on-Chip","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127762471","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1007/978-1-4419-6911-8_4
Stanislavs Golubcovs, A. Yakovlev
{"title":"Asynchronous Communications for NoCs","authors":"Stanislavs Golubcovs, A. Yakovlev","doi":"10.1007/978-1-4419-6911-8_4","DOIUrl":"https://doi.org/10.1007/978-1-4419-6911-8_4","url":null,"abstract":"","PeriodicalId":299942,"journal":{"name":"Low Power Networks-on-Chip","volume":"206 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116515585","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1007/978-1-4419-6911-8_7
R. Beraha, Isask'har Walter, I. Cidon, A. Kolodny
{"title":"Latency-Constrained, Power-Optimized NoC Design for a 4G SoC: A Case Study","authors":"R. Beraha, Isask'har Walter, I. Cidon, A. Kolodny","doi":"10.1007/978-1-4419-6911-8_7","DOIUrl":"https://doi.org/10.1007/978-1-4419-6911-8_7","url":null,"abstract":"","PeriodicalId":299942,"journal":{"name":"Low Power Networks-on-Chip","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122264520","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1007/978-1-4419-6911-8_3
P. Ampadu, Bo Fu, D. Wolpert, Qiaoyan Yu
{"title":"Adaptive Voltage Control for Energy-Efficient NoC Links","authors":"P. Ampadu, Bo Fu, D. Wolpert, Qiaoyan Yu","doi":"10.1007/978-1-4419-6911-8_3","DOIUrl":"https://doi.org/10.1007/978-1-4419-6911-8_3","url":null,"abstract":"","PeriodicalId":299942,"journal":{"name":"Low Power Networks-on-Chip","volume":"39 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129279138","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1007/978-1-4419-6911-8_8
Ciprian Seiculescu, S. Murali, L. Benini, G. Micheli
{"title":"Design and Analysis of NoCs for Low-Power 2D and 3D SoCs","authors":"Ciprian Seiculescu, S. Murali, L. Benini, G. Micheli","doi":"10.1007/978-1-4419-6911-8_8","DOIUrl":"https://doi.org/10.1007/978-1-4419-6911-8_8","url":null,"abstract":"","PeriodicalId":299942,"journal":{"name":"Low Power Networks-on-Chip","volume":"367 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122845955","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1007/978-1-4419-6911-8_9
Jung Ho Ahn, R. Beausoleil, N. Binkert, A. Davis, Marco Fiorentino, N. Jouppi, M. McLaren, M. Monchiero, Naveen Muralimanohar, R. Schreiber, D. Vantrease
{"title":"CMOS Nanophotonics: Technology, System Implications, and a CMP Case Study","authors":"Jung Ho Ahn, R. Beausoleil, N. Binkert, A. Davis, Marco Fiorentino, N. Jouppi, M. McLaren, M. Monchiero, Naveen Muralimanohar, R. Schreiber, D. Vantrease","doi":"10.1007/978-1-4419-6911-8_9","DOIUrl":"https://doi.org/10.1007/978-1-4419-6911-8_9","url":null,"abstract":"","PeriodicalId":299942,"journal":{"name":"Low Power Networks-on-Chip","volume":"105 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134284020","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：