Pub Date : 2024-07-23DOI: 10.3390/electronicmat5030009
M. Cioni, G. Giorgino, A. Chini, Antonino Parisi, G. Cappellini, C. Miccoli, M. E. Castagna, C. Tringali, F. Iucolano
In this paper, a new method for evaluating hot-electron degradation in p-GaN gate AlGaN/GaN power HEMTs is proposed. The method exploits a commercial parameter analyzer to study VTH and RON drifts induced by on-state stress at VDS = 50 V. The results show that VTH drift and part of the RON degradation induced by the on-state stress are recoverable and likely due to the ionization of C-related acceptors in the buffer. This was confirmed by a preliminary characterization of C-related buffer traps. Conversely, the remaining part of RON degradation (not recovered in 1000 s) was strongly affected by the surface treatment. The current level set during on-state stress affected the amount of non-recoverable degradation, confirming the involvement of hot electrons. Thanks to the monitoring of the parameters’ recovery, the proposed method provides important insights into the physical mechanisms governing the parameters’ degradation. This extends the capabilities of state-of-the art systems, without the need for custom setup development.
本文提出了一种评估 p-GaN 栅 AlGaN/GaN 功率 HEMT 热电子退化的新方法。结果表明，通态应力引起的 VTH 漂移和部分 RON 退化是可恢复的，很可能是由于缓冲器中与 C 相关的受体电离造成的。对与 C 有关的缓冲阱进行的初步鉴定证实了这一点。相反，RON 降解的剩余部分（1000 秒内未恢复）则受到表面处理的强烈影响。通态应力期间设定的电流水平影响了不可恢复的降解量，这证实了热电子的参与。通过对参数恢复的监测，所提出的方法为了解参数降解的物理机制提供了重要依据。这扩展了最先进系统的功能，而无需进行定制设置开发。
{"title":"Alternative Measurement Approach for the Evaluation of Hot-Electron Degradation in p-GaN Gate AlGaN/GaN Power HEMTs","authors":"M. Cioni, G. Giorgino, A. Chini, Antonino Parisi, G. Cappellini, C. Miccoli, M. E. Castagna, C. Tringali, F. Iucolano","doi":"10.3390/electronicmat5030009","DOIUrl":"https://doi.org/10.3390/electronicmat5030009","url":null,"abstract":"In this paper, a new method for evaluating hot-electron degradation in p-GaN gate AlGaN/GaN power HEMTs is proposed. The method exploits a commercial parameter analyzer to study VTH and RON drifts induced by on-state stress at VDS = 50 V. The results show that VTH drift and part of the RON degradation induced by the on-state stress are recoverable and likely due to the ionization of C-related acceptors in the buffer. This was confirmed by a preliminary characterization of C-related buffer traps. Conversely, the remaining part of RON degradation (not recovered in 1000 s) was strongly affected by the surface treatment. The current level set during on-state stress affected the amount of non-recoverable degradation, confirming the involvement of hot electrons. Thanks to the monitoring of the parameters’ recovery, the proposed method provides important insights into the physical mechanisms governing the parameters’ degradation. This extends the capabilities of state-of-the art systems, without the need for custom setup development.","PeriodicalId":512974,"journal":{"name":"Electronic Materials","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2024-07-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141812892","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The rising demand for increased integration and higher power outputs poses a hidden risk to the long-term reliable operation of third-generation semiconductors. Thus, the power cycling test (PCT) is widely regarded as the utmost critical test for assessing the packaging reliability of power devices. In this work, low-thermal-resistance packaging design structures of SiC devices are introduced, encompassing planar packaging with dual heat dissipation, press-pack packaging, three-dimensional (3D) packaging, and hybrid packaging. PCT methods and their control strategies are summarized and discussed. Direct-current PCT is the focus of this review. The failure mechanisms of SiC devices under PCT are pointed out. The electrical and temperature-sensitive parameters adopted to monitor the aging of SiC devices are organized. The existing international standards for PCT are evaluated. Due to the lack of authoritative statements for SiC devices, it is difficult to achieve comparison research results without consistent preconditions. Furthermore, the lifetimes of the various packaging designs of the tested SiC devices under PCTs are statistically analyzed. Additionally, problems related to parameter monitoring and test equipment are also summarized. This review explores the broader landscape by delving into the current challenges and main trends in PCTs for SiC devices.
对更高集成度和更高功率输出的需求不断增长，给第三代半导体的长期可靠运行带来了隐患。因此，功率循环测试（PCT）被广泛认为是评估功率器件封装可靠性的最关键测试。本文介绍了 SiC 器件的低热阻封装设计结构，包括双散热平面封装、压装封装、三维（3D）封装和混合封装。总结并讨论了 PCT 方法及其控制策略。本综述的重点是直流 PCT。指出了 PCT 下 SiC 器件的失效机制。整理了用于监测 SiC 器件老化的电学和温度敏感参数。评估了现有的 PCT 国际标准。由于缺乏针对碳化硅器件的权威声明，在没有一致前提条件的情况下很难取得比较研究成果。此外，还对在 PCT 条件下测试的各种封装设计的碳化硅器件的寿命进行了统计分析。此外，还总结了与参数监控和测试设备相关的问题。本综述通过深入探讨当前在碳化硅器件 PCT 方面所面临的挑战和主要趋势，探索了更广阔的前景。
{"title":"Review on Power Cycling Reliability of SiC Power Device","authors":"Xu Gao, Qiang Jia, Yishu Wang, Hongqiang Zhang, Limin Ma, Guisheng Zou, Fu Guo","doi":"10.3390/electronicmat5020007","DOIUrl":"https://doi.org/10.3390/electronicmat5020007","url":null,"abstract":"The rising demand for increased integration and higher power outputs poses a hidden risk to the long-term reliable operation of third-generation semiconductors. Thus, the power cycling test (PCT) is widely regarded as the utmost critical test for assessing the packaging reliability of power devices. In this work, low-thermal-resistance packaging design structures of SiC devices are introduced, encompassing planar packaging with dual heat dissipation, press-pack packaging, three-dimensional (3D) packaging, and hybrid packaging. PCT methods and their control strategies are summarized and discussed. Direct-current PCT is the focus of this review. The failure mechanisms of SiC devices under PCT are pointed out. The electrical and temperature-sensitive parameters adopted to monitor the aging of SiC devices are organized. The existing international standards for PCT are evaluated. Due to the lack of authoritative statements for SiC devices, it is difficult to achieve comparison research results without consistent preconditions. Furthermore, the lifetimes of the various packaging designs of the tested SiC devices under PCTs are statistically analyzed. Additionally, problems related to parameter monitoring and test equipment are also summarized. This review explores the broader landscape by delving into the current challenges and main trends in PCTs for SiC devices.","PeriodicalId":512974,"journal":{"name":"Electronic Materials","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2024-06-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141362740","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-06-06DOI: 10.3390/electronicmat5020006
So-Yeon Kwon, W. Ko, Jun-Ho Byun, Do-Yeon Lee, H. Lee, Ga-Won Lee
In this study, the bipolar switching behaviors in ZnO/HfO2 bilayer resistive random-access memory (RRAM), depending on different metal top electrodes (TE), are analyzed. For this purpose, devices with two types of TE–TiN/Ti and Pd, which have varying oxygen affinities, are fabricated. X-ray diffraction (XRD) analysis shows that ZnO has a hexagonal wurtzite structure, and HfO2 exhibits both monoclinic and orthorhombic phases. The average grain sizes are 10.9 nm for ZnO and 1.55 nm for HfO2. In regards to the electrical characteristics, the I–V curve, cycling test, and voltage stress are measured. The measurement results indicate that devices with TiN/Ti TE exhibit lower set and higher reset voltage and stable bipolar switching behavior. However, a device with Pd TE demonstrates higher set and lower reset voltage. This phenomenon can be explained by the Gibbs free energy of formation (∆Gf°). Additionally, the Pd TE device shows unstable bipolar switching characteristics, where unipolar switching occurs simultaneously during the cycling test. This instability in devices with Pd TE could potentially lead to soft errors in operation. For guaranteeing stable bipolar switching, the oxygen affinity of material for TE should be considered in regards to ZnO/HfO2 bilayer RRAM.
本研究分析了 ZnO/HfO2 双层电阻式随机存取存储器（RRAM）中的双极开关行为，这取决于不同的金属顶电极（TE）。为此，制备了具有不同氧亲和性的两种TE-TiN/Ti和Pd的器件。X 射线衍射 (XRD) 分析表明，ZnO 具有六方菱面体结构，而 HfO2 则同时具有单斜和正方晶相。ZnO 和 HfO2 的平均晶粒大小分别为 10.9 nm 和 1.55 nm。在电气特性方面，测量了 I-V 曲线、循环测试和电压应力。测量结果表明，采用 TiN/Ti TE 的器件具有较低的设定电压和较高的复位电压，以及稳定的双极开关行为。然而，使用 Pd TE 的器件则显示出较高的设定电压和较低的复位电压。这一现象可以用形成的吉布斯自由能（ΔGf°）来解释。此外，钯 TE 器件显示出不稳定的双极开关特性，在循环测试期间同时出现单极开关。Pd TE 器件的这种不稳定性有可能导致运行中的软误差。为了保证稳定的双极开关，在 ZnO/HfO2 双层 RRAM 中应考虑 TE 材料的氧亲和性。
{"title":"The Switching Characteristics in Bilayer ZnO/HfO2 Resistive Random-Access Memory, Depending on the Top Electrode","authors":"So-Yeon Kwon, W. Ko, Jun-Ho Byun, Do-Yeon Lee, H. Lee, Ga-Won Lee","doi":"10.3390/electronicmat5020006","DOIUrl":"https://doi.org/10.3390/electronicmat5020006","url":null,"abstract":"In this study, the bipolar switching behaviors in ZnO/HfO2 bilayer resistive random-access memory (RRAM), depending on different metal top electrodes (TE), are analyzed. For this purpose, devices with two types of TE–TiN/Ti and Pd, which have varying oxygen affinities, are fabricated. X-ray diffraction (XRD) analysis shows that ZnO has a hexagonal wurtzite structure, and HfO2 exhibits both monoclinic and orthorhombic phases. The average grain sizes are 10.9 nm for ZnO and 1.55 nm for HfO2. In regards to the electrical characteristics, the I–V curve, cycling test, and voltage stress are measured. The measurement results indicate that devices with TiN/Ti TE exhibit lower set and higher reset voltage and stable bipolar switching behavior. However, a device with Pd TE demonstrates higher set and lower reset voltage. This phenomenon can be explained by the Gibbs free energy of formation (∆Gf°). Additionally, the Pd TE device shows unstable bipolar switching characteristics, where unipolar switching occurs simultaneously during the cycling test. This instability in devices with Pd TE could potentially lead to soft errors in operation. For guaranteeing stable bipolar switching, the oxygen affinity of material for TE should be considered in regards to ZnO/HfO2 bilayer RRAM.","PeriodicalId":512974,"journal":{"name":"Electronic Materials","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2024-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"141380047","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-05-13DOI: 10.3390/electronicmat5020005
Tamiru Kebede, M. Abebe, Dhakshnamoorthy Mani, Aparna Thankappan, Sabu Thomas, Jung Yong Kim
All-inorganic perovskite semiconductors have received significant interest for their potential stability over heat and humidity. However, the typical CsPbI3 displays phase instability despite its desirable bandgap of ~1.73 eV. Herein, we studied the mixed halide perovskite CsPbI2Br by varying the silver doping concentration. For this purpose, we examined its bandgap tunability as a function of the silver doping by using density functional theory. Then, we studied the effect of silver on the structural and optical properties of CsPbI2Br. Resultantly, we found that ‘silver doping’ allowed for partial bandgap tunability from 1.91 eV to 2.05 eV, increasing the photoluminescence (PL) lifetime from 0.990 ns to 1.187 ns, and, finally, contributing to the structural stability when examining the aging effect via X-ray diffraction. Then, through the analysis of the intermolecular interactions based on the solubility parameter, we explain the solvent engineering process in relation to the solvent trapping phenomena in CsPbI2Br thin films. However, silver doping may induce a defect morphology (e.g., a pinhole) during the formation of the thin films.
全无机包晶半导体因其潜在的耐热性和耐湿性而备受关注。然而，典型的 CsPbI3 尽管具有 ~1.73 eV 的理想带隙，却显示出相不稳定性。在这里，我们通过改变银的掺杂浓度来研究混合卤化物包晶 CsPbI2Br。为此，我们利用密度泛函理论研究了其带隙的可调谐性与银掺杂量的函数关系。然后，我们研究了银对 CsPbI2Br 结构和光学特性的影响。结果发现，"银掺杂 "使部分带隙可调性从 1.91 eV 提高到 2.05 eV，使光致发光（PL）寿命从 0.990 ns 提高到 1.187 ns，最后，在通过 X 射线衍射研究老化效应时，还有助于提高结构稳定性。然后，通过基于溶解度参数的分子间相互作用分析，我们解释了与 CsPbI2Br 薄膜中溶剂捕集现象有关的溶剂工程过程。然而，银掺杂可能会在薄膜形成过程中诱发缺陷形态（如针孔）。
{"title":"Silver-Doped CsPbI2Br Perovskite Semiconductor Thin Films","authors":"Tamiru Kebede, M. Abebe, Dhakshnamoorthy Mani, Aparna Thankappan, Sabu Thomas, Jung Yong Kim","doi":"10.3390/electronicmat5020005","DOIUrl":"https://doi.org/10.3390/electronicmat5020005","url":null,"abstract":"All-inorganic perovskite semiconductors have received significant interest for their potential stability over heat and humidity. However, the typical CsPbI3 displays phase instability despite its desirable bandgap of ~1.73 eV. Herein, we studied the mixed halide perovskite CsPbI2Br by varying the silver doping concentration. For this purpose, we examined its bandgap tunability as a function of the silver doping by using density functional theory. Then, we studied the effect of silver on the structural and optical properties of CsPbI2Br. Resultantly, we found that ‘silver doping’ allowed for partial bandgap tunability from 1.91 eV to 2.05 eV, increasing the photoluminescence (PL) lifetime from 0.990 ns to 1.187 ns, and, finally, contributing to the structural stability when examining the aging effect via X-ray diffraction. Then, through the analysis of the intermolecular interactions based on the solubility parameter, we explain the solvent engineering process in relation to the solvent trapping phenomena in CsPbI2Br thin films. However, silver doping may induce a defect morphology (e.g., a pinhole) during the formation of the thin films.","PeriodicalId":512974,"journal":{"name":"Electronic Materials","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2024-05-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140985494","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-04-16DOI: 10.3390/electronicmat5020004
Sonia Ceron, David Barba, Miguel A. Dominguez
The functionalization of conductive inks has been carried out through the decomposition of hydrogen peroxide (H2O2) onto the surface of silver nanoparticles (AgNPs). The ink prepared using this eco-friendly chemical reagent has been characterized structurally, chemically, and morphologically, showing the presence of stable AgNPs with suitable properties as well as the absence of residual contamination. The electrical conductivity of such a solution-processable ink is evidenced for patterns designed on flexible photographic paper substrates, using a refillable fountain pen that is implemented as a printing mechanism for the fabrication of simple printed circuit boards (PCBs). The functionality and durability of the tested systems are demonstrated under various mechanical constraints, aiming to basically reproduce the normal operation conditions of flexible electronic devices. The obtained results indicate that the implementation of these AgNP-based inks is relevant for direct applications in inkjet printing technology, thus paving the way for the use of greener chemicals in ink preparation.
{"title":"Solution-Processable and Eco-Friendly Functionalization of Conductive Silver Nanoparticles Inks for Printable Electronics","authors":"Sonia Ceron, David Barba, Miguel A. Dominguez","doi":"10.3390/electronicmat5020004","DOIUrl":"https://doi.org/10.3390/electronicmat5020004","url":null,"abstract":"The functionalization of conductive inks has been carried out through the decomposition of hydrogen peroxide (H2O2) onto the surface of silver nanoparticles (AgNPs). The ink prepared using this eco-friendly chemical reagent has been characterized structurally, chemically, and morphologically, showing the presence of stable AgNPs with suitable properties as well as the absence of residual contamination. The electrical conductivity of such a solution-processable ink is evidenced for patterns designed on flexible photographic paper substrates, using a refillable fountain pen that is implemented as a printing mechanism for the fabrication of simple printed circuit boards (PCBs). The functionality and durability of the tested systems are demonstrated under various mechanical constraints, aiming to basically reproduce the normal operation conditions of flexible electronic devices. The obtained results indicate that the implementation of these AgNP-based inks is relevant for direct applications in inkjet printing technology, thus paving the way for the use of greener chemicals in ink preparation.","PeriodicalId":512974,"journal":{"name":"Electronic Materials","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2024-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140696439","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-03-13DOI: 10.3390/electronicmat5010003
Gayan K. L. Sankalpa, Gayan R. K. K. G. R. Kumarasinghe, B. Dassanayake, Gayan W. C. Kumarage
The impact of N2 purging in the CdS deposition bath and subsequent N2 annealing is examined and contrasted with conventional CdS films, which were deposited without purging and annealed in ambient air. All films were fabricated using the chemical bath deposition method at a temperature of 80 °C on fluorine-doped tin oxide glass slides (FTO). N2 purged films were deposited by introducing nitrogen gas into the deposition bath throughout the CdS deposition process. Subsequently, both N2 purged and un-purged films underwent annealing at temperatures ranging from 100 to 500 °C for one hour, either in a nitrogen or ambient air environment. Photoelectrochemical (PEC) cell studies reveal that films subjected to both N2 purging and N2 annealing exhibit a notable enhancement of 37.5% and 27% in ISC (short-circuit current) and VOC (open-circuit voltage) values, accompanied by a 5% improvement in optical transmittance compared to conventional CdS thin films. The films annealed at 300 °C demonstrate the highest ISC, VOC, and VFB values, 55 μA, 0.475 V, and −675 mV, respectively. The improved optoelectrical properties in both N2-purged and N2-annealed films are attributed to their well-packed structure, enhanced interconnectivity, and a higher sulfur to cadmium ratio of 0.76 in the films.
{"title":"Enhancement of Photo-Electrical Properties of CdS Thin Films: Effect of N2 Purging and N2 Annealing","authors":"Gayan K. L. Sankalpa, Gayan R. K. K. G. R. Kumarasinghe, B. Dassanayake, Gayan W. C. Kumarage","doi":"10.3390/electronicmat5010003","DOIUrl":"https://doi.org/10.3390/electronicmat5010003","url":null,"abstract":"The impact of N2 purging in the CdS deposition bath and subsequent N2 annealing is examined and contrasted with conventional CdS films, which were deposited without purging and annealed in ambient air. All films were fabricated using the chemical bath deposition method at a temperature of 80 °C on fluorine-doped tin oxide glass slides (FTO). N2 purged films were deposited by introducing nitrogen gas into the deposition bath throughout the CdS deposition process. Subsequently, both N2 purged and un-purged films underwent annealing at temperatures ranging from 100 to 500 °C for one hour, either in a nitrogen or ambient air environment. Photoelectrochemical (PEC) cell studies reveal that films subjected to both N2 purging and N2 annealing exhibit a notable enhancement of 37.5% and 27% in ISC (short-circuit current) and VOC (open-circuit voltage) values, accompanied by a 5% improvement in optical transmittance compared to conventional CdS thin films. The films annealed at 300 °C demonstrate the highest ISC, VOC, and VFB values, 55 μA, 0.475 V, and −675 mV, respectively. The improved optoelectrical properties in both N2-purged and N2-annealed films are attributed to their well-packed structure, enhanced interconnectivity, and a higher sulfur to cadmium ratio of 0.76 in the films.","PeriodicalId":512974,"journal":{"name":"Electronic Materials","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2024-03-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140246163","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-02-23DOI: 10.3390/electronicmat5010002
Mahmoud Darwish, László Pohl
This article investigates resistive random access memory (ReRAM) crossbar memory arrays, which is a notable development in non-volatile memory technology. We highlight ReRAM’s competitive edge over NAND, NOR Flash, and phase-change memory (PCM), particularly in terms of endurance, speed, and energy efficiency. This paper focuses on the architecture of crossbar arrays, where memristive devices are positioned at intersecting metal wires. We emphasize the unique resistive switching mechanisms of memristors and the challenges of sneak path currents and delve into the roles and configurations of selectors, particularly focusing on the one-selector one-resistor (1S1R) architecture with an insulator–metal transition (IMT) based selector. We use SPICE simulations based on defined models to examine a 3 × 3 1S1R ReRAM array with vanadium dioxide selectors and titanium dioxide film memristors, assessing the impact of ambient temperature and critical IMT temperatures on array performance. We highlight the operational regions of low resistive state (LRS) and high resistive state (HRS), providing insights into the electrical behavior of these components under various conditions. Lastly, we demonstrate the impact of selector presence on sneak path currents. This research contributes to the overall understanding of ReRAM crossbar arrays integrated with IMT material-based selectors.
{"title":"Insulator Metal Transition-Based Selector in Crossbar Memory Arrays","authors":"Mahmoud Darwish, László Pohl","doi":"10.3390/electronicmat5010002","DOIUrl":"https://doi.org/10.3390/electronicmat5010002","url":null,"abstract":"This article investigates resistive random access memory (ReRAM) crossbar memory arrays, which is a notable development in non-volatile memory technology. We highlight ReRAM’s competitive edge over NAND, NOR Flash, and phase-change memory (PCM), particularly in terms of endurance, speed, and energy efficiency. This paper focuses on the architecture of crossbar arrays, where memristive devices are positioned at intersecting metal wires. We emphasize the unique resistive switching mechanisms of memristors and the challenges of sneak path currents and delve into the roles and configurations of selectors, particularly focusing on the one-selector one-resistor (1S1R) architecture with an insulator–metal transition (IMT) based selector. We use SPICE simulations based on defined models to examine a 3 × 3 1S1R ReRAM array with vanadium dioxide selectors and titanium dioxide film memristors, assessing the impact of ambient temperature and critical IMT temperatures on array performance. We highlight the operational regions of low resistive state (LRS) and high resistive state (HRS), providing insights into the electrical behavior of these components under various conditions. Lastly, we demonstrate the impact of selector presence on sneak path currents. This research contributes to the overall understanding of ReRAM crossbar arrays integrated with IMT material-based selectors.","PeriodicalId":512974,"journal":{"name":"Electronic Materials","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2024-02-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140435848","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2024-01-31DOI: 10.3390/electronicmat5010001
G. Suchaneck, E. Artiukh, N. Kalanda, M. Yarmolich, Gerald Gerlach
In this work, we demonstrate the preparation of easy-to-fabricate nanogranular strontium ferromolybdate/strontium molybdate core-shell ceramics and examine their properties, including tunnel magnetoresistance, magnetic field sensitivity, and temperature coefficient of the tunnel magnetoresistance. The tunnel magnetoresistance of nanogranular strontium ferromolybdate/strontium molybdate core-shell ceramics was modeled, yielding values suitable for magnetoresistive sensor applications. Such structures possess a narrow peak of magnetic flux sensibility located at about 80 mT. For magnetic flux measurement, single-domain granules with superparamagnetic behavior should be applied. The predicted TMR magnetic flux sensitivities for granules with superparamagnetic behavior amount to about 7.7% T−1 and 1.5% T−1 for granule sizes of 3 nm and 5 nm, respectively. A drawback of the tunnel magnetoresistance of such nanogranular core-shell ceramics is the unacceptably large value of the temperature coefficient. Acceptable values, lower than 2% K−1, are obtained only at low temperatures (less than 100 K) or large magnetic flux densities (exceeding 6 T). Therefore, a Wheatstone bridge configuration should be adopted for magnetoresistive sensor design to compensate for the effect of temperature.
{"title":"Nanogranular Strontium Ferromolybdate/Strontium Molybdate Ceramics—A Magnetic Material Possessing a Natural Core-Shell Structure","authors":"G. Suchaneck, E. Artiukh, N. Kalanda, M. Yarmolich, Gerald Gerlach","doi":"10.3390/electronicmat5010001","DOIUrl":"https://doi.org/10.3390/electronicmat5010001","url":null,"abstract":"In this work, we demonstrate the preparation of easy-to-fabricate nanogranular strontium ferromolybdate/strontium molybdate core-shell ceramics and examine their properties, including tunnel magnetoresistance, magnetic field sensitivity, and temperature coefficient of the tunnel magnetoresistance. The tunnel magnetoresistance of nanogranular strontium ferromolybdate/strontium molybdate core-shell ceramics was modeled, yielding values suitable for magnetoresistive sensor applications. Such structures possess a narrow peak of magnetic flux sensibility located at about 80 mT. For magnetic flux measurement, single-domain granules with superparamagnetic behavior should be applied. The predicted TMR magnetic flux sensitivities for granules with superparamagnetic behavior amount to about 7.7% T−1 and 1.5% T−1 for granule sizes of 3 nm and 5 nm, respectively. A drawback of the tunnel magnetoresistance of such nanogranular core-shell ceramics is the unacceptably large value of the temperature coefficient. Acceptable values, lower than 2% K−1, are obtained only at low temperatures (less than 100 K) or large magnetic flux densities (exceeding 6 T). Therefore, a Wheatstone bridge configuration should be adopted for magnetoresistive sensor design to compensate for the effect of temperature.","PeriodicalId":512974,"journal":{"name":"Electronic Materials","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2024-01-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"140473579","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：