Pub Date : 2001-12-04DOI: 10.1109/APSEC.2001.991490
J. Woodcock, Ana Cavalcanti
This paper presents a formalisation of the steam boiler problem using Circus, a unified theory of the formal specification languages Z and CSP. The aim of Circus is to provide powerful support for the specification of the data-oriented and behavioural aspects of concurrent systems, and to provide a calculational development technique for languages similar to Occam, Java, and Handel-C.
{"title":"The steam boiler in a unified theory of Z and CSP","authors":"J. Woodcock, Ana Cavalcanti","doi":"10.1109/APSEC.2001.991490","DOIUrl":"https://doi.org/10.1109/APSEC.2001.991490","url":null,"abstract":"This paper presents a formalisation of the steam boiler problem using Circus, a unified theory of the formal specification languages Z and CSP. The aim of Circus is to provide powerful support for the specification of the data-oriented and behavioural aspects of concurrent systems, and to provide a calculational development technique for languages similar to Occam, Java, and Handel-C.","PeriodicalId":130293,"journal":{"name":"Proceedings Eighth Asia-Pacific Software Engineering Conference","volume":"27 10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125684129","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-12-04DOI: 10.1109/APSEC.2001.991482
Jinhui Shan, Ji Wang, Zhichang Qi
Automatic generation of test data for a given path in a program is an elementary problem in software testing, the difficulty of which lies in how to solve the nonlinear constraint. Gupta et al. (1998) proposed a method, which is referred to as the iterative relaxation method, to address the above problem by linearizing the predicate functions. This paper improves the iterative relaxation method by omitting the constructions of predicate slice and input dependency set, and proves the equivalence of systems of constraints generated by both methods. Since it is not necessary for our method to analyze the dependencies between statements on the path in the course of deriving a system of constraints, our method still works when some statements are only object or executable codes rather than source codes on the path. Therefore, our method can also be used for generating test data for black-box testing and regression testing. We have developed a prototype of a path-wise test data generator whose fundamental algorithm is presented in this paper. The initial experiments with this prototype have shown that our method is practical.
{"title":"On path-wise automatic generation of test data for both white-box and black-box testing","authors":"Jinhui Shan, Ji Wang, Zhichang Qi","doi":"10.1109/APSEC.2001.991482","DOIUrl":"https://doi.org/10.1109/APSEC.2001.991482","url":null,"abstract":"Automatic generation of test data for a given path in a program is an elementary problem in software testing, the difficulty of which lies in how to solve the nonlinear constraint. Gupta et al. (1998) proposed a method, which is referred to as the iterative relaxation method, to address the above problem by linearizing the predicate functions. This paper improves the iterative relaxation method by omitting the constructions of predicate slice and input dependency set, and proves the equivalence of systems of constraints generated by both methods. Since it is not necessary for our method to analyze the dependencies between statements on the path in the course of deriving a system of constraints, our method still works when some statements are only object or executable codes rather than source codes on the path. Therefore, our method can also be used for generating test data for black-box testing and regression testing. We have developed a prototype of a path-wise test data generator whose fundamental algorithm is presented in this paper. The initial experiments with this prototype have shown that our method is practical.","PeriodicalId":130293,"journal":{"name":"Proceedings Eighth Asia-Pacific Software Engineering Conference","volume":"189 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132588933","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-12-04DOI: 10.1109/APSEC.2001.991461
Pao-Ann Hsiung, Win-Bin See, Trong-Yen Lee, Jih-Ming Fu, Sao-Jie Chen
Producing correct software is a major goal for application frameworks that are targeted at embedded real-time systems because incorrect software is of no use and may also cause severe system damage. It is shown how formal verification can be elegantly, seamlessly, and scalably integrated into a component-based object-oriented application framework for embedded real-time systems. Two issues in such technology integration are addressed: (1) the choice of a common system model, and (2) the integration of formal synthesis and model checking. Solutions are provided, respectively, in the form of (1) proposing a new formal object-oriented model (FOOM), and (2) the execution of model checkers within synthesis algorithms. Technically, we propose a compositional software verification framework, in which model checking is employed, with state-space reduction techniques adapted for embedded real-time software. A separate verifier component is proposed for modular integration as illustrated by its implementation in the VERTAF application framework. An example illustrates the success of our approach and the benefits gained through integrating formal verification.
{"title":"Formal verification of embedded real-time software in component-based application frameworks","authors":"Pao-Ann Hsiung, Win-Bin See, Trong-Yen Lee, Jih-Ming Fu, Sao-Jie Chen","doi":"10.1109/APSEC.2001.991461","DOIUrl":"https://doi.org/10.1109/APSEC.2001.991461","url":null,"abstract":"Producing correct software is a major goal for application frameworks that are targeted at embedded real-time systems because incorrect software is of no use and may also cause severe system damage. It is shown how formal verification can be elegantly, seamlessly, and scalably integrated into a component-based object-oriented application framework for embedded real-time systems. Two issues in such technology integration are addressed: (1) the choice of a common system model, and (2) the integration of formal synthesis and model checking. Solutions are provided, respectively, in the form of (1) proposing a new formal object-oriented model (FOOM), and (2) the execution of model checkers within synthesis algorithms. Technically, we propose a compositional software verification framework, in which model checking is employed, with state-space reduction techniques adapted for embedded real-time software. A separate verifier component is proposed for modular integration as illustrated by its implementation in the VERTAF application framework. An example illustrates the success of our approach and the benefits gained through integrating formal verification.","PeriodicalId":130293,"journal":{"name":"Proceedings Eighth Asia-Pacific Software Engineering Conference","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126245584","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-12-04DOI: 10.1109/APSEC.2001.991478
Il-Chul Yoon, Sang-Yoon Min, Doo-Hwan Bae
Process tailoring and verification are very important since project-specific processes are tailored from an organizational process standard and many quality assurance activities are based on the process standard. However, existing research does not provide a systematic method for process tailoring and verification. In this paper, we propose a systematic method for formalizing a process standard clearly with encapsulated reusable process modules for tailoring and verifying tailored process. AAG (activity artifact graph) is used to represent and tailor each process module. Additionally, a prototype tool is implemented to support the proposed method. We believe that the proposed method is helpful in tailoring a process standard and verifying a tailored process.
{"title":"Tailoring and verifying software process","authors":"Il-Chul Yoon, Sang-Yoon Min, Doo-Hwan Bae","doi":"10.1109/APSEC.2001.991478","DOIUrl":"https://doi.org/10.1109/APSEC.2001.991478","url":null,"abstract":"Process tailoring and verification are very important since project-specific processes are tailored from an organizational process standard and many quality assurance activities are based on the process standard. However, existing research does not provide a systematic method for process tailoring and verification. In this paper, we propose a systematic method for formalizing a process standard clearly with encapsulated reusable process modules for tailoring and verifying tailored process. AAG (activity artifact graph) is used to represent and tailor each process module. Additionally, a prototype tool is implemented to support the proposed method. We believe that the proposed method is helpful in tailoring a process standard and verifying a tailored process.","PeriodicalId":130293,"journal":{"name":"Proceedings Eighth Asia-Pacific Software Engineering Conference","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128883848","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-12-04DOI: 10.1109/APSEC.2001.991463
S. Kundu
We study the problem of creating a functional design from a dataflow diagram D. We use the domination-relationship on data-items in D to obtain a canonical function calling-scheme S(D) which is optimal in that it uses the minimum number of global variables for the interface among functions, while keeping the function parameters to a minimum. The difficulty of determining a function calling-scheme that is both valid and optimal is because the number of valid calling-schemes is exponentially large in the size of D. We also use S(D) to obtain a decomposition of D into larger single-output function-blocks. In previous work we give an algorithm to generate the basic pseudocode for each function, including its interface, for the calling-scheme S(D).
{"title":"The canonical functional design based on the domination-relationship among data","authors":"S. Kundu","doi":"10.1109/APSEC.2001.991463","DOIUrl":"https://doi.org/10.1109/APSEC.2001.991463","url":null,"abstract":"We study the problem of creating a functional design from a dataflow diagram D. We use the domination-relationship on data-items in D to obtain a canonical function calling-scheme S(D) which is optimal in that it uses the minimum number of global variables for the interface among functions, while keeping the function parameters to a minimum. The difficulty of determining a function calling-scheme that is both valid and optimal is because the number of valid calling-schemes is exponentially large in the size of D. We also use S(D) to obtain a decomposition of D into larger single-output function-blocks. In previous work we give an algorithm to generate the basic pseudocode for each function, including its interface, for the calling-scheme S(D).","PeriodicalId":130293,"journal":{"name":"Proceedings Eighth Asia-Pacific Software Engineering Conference","volume":"112 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123028985","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-12-04DOI: 10.1109/APSEC.2001.991458
Yusuka Nonaka, K. Ushijima, Hibiki Serizawa, Shigeru Murata, Jingde Cheng
Deadlock is one of the most serious and complex problems concerning the reliability of concurrent Java programs. In this paper, we discuss how to dynamically detect deadlocks in concurrent Java programs at run-time, and propose a representation of synchronization waiting state in an execution of a Java program, which is named the Java thread-wait-for graph. We explicitly define all types of deadlocks in Java with this representation and present an algorithm to detect the deadlocks. Two implementation methods are also presented. We succeeded in detecting a deadlock from a concurrent program, including all types of synchronization waiting relations, using our tool.
{"title":"A run-time deadlock detector for concurrent Java programs","authors":"Yusuka Nonaka, K. Ushijima, Hibiki Serizawa, Shigeru Murata, Jingde Cheng","doi":"10.1109/APSEC.2001.991458","DOIUrl":"https://doi.org/10.1109/APSEC.2001.991458","url":null,"abstract":"Deadlock is one of the most serious and complex problems concerning the reliability of concurrent Java programs. In this paper, we discuss how to dynamically detect deadlocks in concurrent Java programs at run-time, and propose a representation of synchronization waiting state in an execution of a Java program, which is named the Java thread-wait-for graph. We explicitly define all types of deadlocks in Java with this representation and present an algorithm to detect the deadlocks. Two implementation methods are also presented. We succeeded in detecting a deadlock from a concurrent program, including all types of synchronization waiting relations, using our tool.","PeriodicalId":130293,"journal":{"name":"Proceedings Eighth Asia-Pacific Software Engineering Conference","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133583287","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-12-04DOI: 10.1109/APSEC.2001.991459
D. Park, Soo Dong Kim
Generating program source code based on a design model using a CASE tool is an important area in forward engineering. The generation of code from a design model is valuable in making developers maintain consistency between a model and its implementation and abating the routine work of writing skeleton source codes. However, implementing code generation with a CASE tool is not simple due to the metadata format, language, and policies of adopting a modeler's option. Because of the continuous introduction of development environments like EJB and COM, the extensibility of CASE tools becomes the principal factor for comparison. We believe that its feasible to generate source code in various languages based on a generation rule. In this paper, we propose an XML based code generation rule and code generator. The proposed rule provides higher level constructs to the developer for describing code generation, and by making the code generator independent of repository format, the increased applicability of the code generator is shown.
{"title":"XML rule based source code generator for UML CASE tool","authors":"D. Park, Soo Dong Kim","doi":"10.1109/APSEC.2001.991459","DOIUrl":"https://doi.org/10.1109/APSEC.2001.991459","url":null,"abstract":"Generating program source code based on a design model using a CASE tool is an important area in forward engineering. The generation of code from a design model is valuable in making developers maintain consistency between a model and its implementation and abating the routine work of writing skeleton source codes. However, implementing code generation with a CASE tool is not simple due to the metadata format, language, and policies of adopting a modeler's option. Because of the continuous introduction of development environments like EJB and COM, the extensibility of CASE tools becomes the principal factor for comparison. We believe that its feasible to generate source code in various languages based on a generation rule. In this paper, we propose an XML based code generation rule and code generator. The proposed rule provides higher level constructs to the developer for describing code generation, and by making the code generator independent of repository format, the increased applicability of the code generator is shown.","PeriodicalId":130293,"journal":{"name":"Proceedings Eighth Asia-Pacific Software Engineering Conference","volume":"348 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123254948","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-12-04DOI: 10.1109/APSEC.2001.991484
Shui-Ming Ho, K. Lau
Frameworks are increasingly recognised as very useful components in the emerging paradigm of component-based software development (CBD). They are widely accepted as better units of reuse than objects. In the leading industrial CBD methodology Catalysis, for instance, frameworks are fundamental units of reuse. In this paper, we discuss the implementation of Catalysis frameworks in COM.
{"title":"On the implementation of Catalysis frameworks in COM","authors":"Shui-Ming Ho, K. Lau","doi":"10.1109/APSEC.2001.991484","DOIUrl":"https://doi.org/10.1109/APSEC.2001.991484","url":null,"abstract":"Frameworks are increasingly recognised as very useful components in the emerging paradigm of component-based software development (CBD). They are widely accepted as better units of reuse than objects. In the leading industrial CBD methodology Catalysis, for instance, frameworks are fundamental units of reuse. In this paper, we discuss the implementation of Catalysis frameworks in COM.","PeriodicalId":130293,"journal":{"name":"Proceedings Eighth Asia-Pacific Software Engineering Conference","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123669187","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-12-04DOI: 10.1109/APSEC.2001.991513
G. Kassel, Graeme Smith
This paper investigates model checking Object-Z classes via their translation to the input notation of the CSP model checker FDR. Such a translation must not only be concerned with preserving the semantics of the original specification, but also with how efficiently the resulting specification can be model checked. Hence, the paper investigates alternative translation schemes and compares how efficiently the resulting specifications can be checked.
{"title":"Model checking Object-Z classes: Some experiments with FDR","authors":"G. Kassel, Graeme Smith","doi":"10.1109/APSEC.2001.991513","DOIUrl":"https://doi.org/10.1109/APSEC.2001.991513","url":null,"abstract":"This paper investigates model checking Object-Z classes via their translation to the input notation of the CSP model checker FDR. Such a translation must not only be concerned with preserving the semantics of the original specification, but also with how efficiently the resulting specification can be model checked. Hence, the paper investigates alternative translation schemes and compares how efficiently the resulting specifications can be checked.","PeriodicalId":130293,"journal":{"name":"Proceedings Eighth Asia-Pacific Software Engineering Conference","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127338721","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-12-04DOI: 10.1109/APSEC.2001.991469
D. Zowghi, V. Gervasi, Andrew McRae
The use of logic in identifying and analysing inconsistency in requirements from multiple stakeholders has been found to be effective in a number of studies. Default reasoning is a theoretically well founded formalism that is especially suited for supporting the evolution of requirements. However, direct use of logic in eliciting requirements and in discussing them with stakeholders poses serious useability problems. In this paper we explore the integration of natural language parsing techniques with default reasoning to overcome these difficulties. We also propose a method for automatically discovering scenarios that expose inconsistencies in requirements, and show how to deal with them in a formal manner. These techniques were implemented and tested in a prototype tool called CARL.
{"title":"Using default reasoning to discover inconsistencies in natural language requirements","authors":"D. Zowghi, V. Gervasi, Andrew McRae","doi":"10.1109/APSEC.2001.991469","DOIUrl":"https://doi.org/10.1109/APSEC.2001.991469","url":null,"abstract":"The use of logic in identifying and analysing inconsistency in requirements from multiple stakeholders has been found to be effective in a number of studies. Default reasoning is a theoretically well founded formalism that is especially suited for supporting the evolution of requirements. However, direct use of logic in eliciting requirements and in discussing them with stakeholders poses serious useability problems. In this paper we explore the integration of natural language parsing techniques with default reasoning to overcome these difficulties. We also propose a method for automatically discovering scenarios that expose inconsistencies in requirements, and show how to deal with them in a formal manner. These techniques were implemented and tested in a prototype tool called CARL.","PeriodicalId":130293,"journal":{"name":"Proceedings Eighth Asia-Pacific Software Engineering Conference","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-12-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122203245","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}