Pub Date : 2014-12-01DOI: 10.1109/ICCIC.2014.7238479
S. V. Appaji, G. Acharyulu
The Four Stage Encryption System introduced by Acharyulu and Appaji provides secrecy even when the attacker has some samples of plain texts and their corresponding cipher texts obtained with the same key, because the cipher text generated each time, for the same plain text with the same key, is different. In other words, the system is secure against adaptive chosen-plain text attack. Another interesting feature is that even the size of the cipher text, for given plain text under a given key, is unpredictable. In this paper the use of the system and sensible evidence to the strength of the system are demonstrated by executing it sufficiently large number of times for different choices of plain texts and keys.
{"title":"A study of four stage encryption: Experimental results","authors":"S. V. Appaji, G. Acharyulu","doi":"10.1109/ICCIC.2014.7238479","DOIUrl":"https://doi.org/10.1109/ICCIC.2014.7238479","url":null,"abstract":"The Four Stage Encryption System introduced by Acharyulu and Appaji provides secrecy even when the attacker has some samples of plain texts and their corresponding cipher texts obtained with the same key, because the cipher text generated each time, for the same plain text with the same key, is different. In other words, the system is secure against adaptive chosen-plain text attack. Another interesting feature is that even the size of the cipher text, for given plain text under a given key, is unpredictable. In this paper the use of the system and sensible evidence to the strength of the system are demonstrated by executing it sufficiently large number of times for different choices of plain texts and keys.","PeriodicalId":187874,"journal":{"name":"2014 IEEE International Conference on Computational Intelligence and Computing Research","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125190160","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-01DOI: 10.1109/ICCIC.2014.7238449
J. P. Sharma, Vibhor Chauhan
Voltage sags during short-circuit faults are one of the major power quality problems and voltage sag mitigation at point of common coupling (PCC) is proposed using solid state fault current limiter (SSFCL). The proposed SSFCL is tested on a practical express distribution feeder, Bajaj hospital in a MATLAB/SIMULINK environment. Proposed SSFCL mitigate voltage sag at PCC for various unsymmetrical/symmetrical faults such single phase-to-ground, phase-to-phase, three phase and two-phase-to ground faults. In present scenario increased demand of electricity has raised short circuit level of power system. Proposed SSFCL also limit fault current significantly and thus reduced short circuit level and electromagnetic stress in associated equipment's. The performance of proposed SSFCL is evaluated in the forms of voltage sag mitigation and suppression of fault current for unsymmetrical/symmetrical faults and it is shown that, SSFCL has tremendous competence of suppressing the fault current and voltage mitigation quasi instantaneously that leads more reliable and stable condition of system.
{"title":"Application of solid state fault current limiter on express feeder for voltage sag mitigation","authors":"J. P. Sharma, Vibhor Chauhan","doi":"10.1109/ICCIC.2014.7238449","DOIUrl":"https://doi.org/10.1109/ICCIC.2014.7238449","url":null,"abstract":"Voltage sags during short-circuit faults are one of the major power quality problems and voltage sag mitigation at point of common coupling (PCC) is proposed using solid state fault current limiter (SSFCL). The proposed SSFCL is tested on a practical express distribution feeder, Bajaj hospital in a MATLAB/SIMULINK environment. Proposed SSFCL mitigate voltage sag at PCC for various unsymmetrical/symmetrical faults such single phase-to-ground, phase-to-phase, three phase and two-phase-to ground faults. In present scenario increased demand of electricity has raised short circuit level of power system. Proposed SSFCL also limit fault current significantly and thus reduced short circuit level and electromagnetic stress in associated equipment's. The performance of proposed SSFCL is evaluated in the forms of voltage sag mitigation and suppression of fault current for unsymmetrical/symmetrical faults and it is shown that, SSFCL has tremendous competence of suppressing the fault current and voltage mitigation quasi instantaneously that leads more reliable and stable condition of system.","PeriodicalId":187874,"journal":{"name":"2014 IEEE International Conference on Computational Intelligence and Computing Research","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125630244","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-01DOI: 10.1109/ICCIC.2014.7238340
Moin Hasan, Major Singh Goraya
Multi-processor systems are advantageous in the sense that they allow concurrent execution of the given workload. The workload can be thought as the computation units which can be either processes or tasks. These processes or tasks can either be independent programs or partitioned modules of a single program. This paper presents an algorithm named as “Successive Stage Multi Round Scheduling” which is able to allocate and balance the given workload among the connected processing units of the Multi-processor system in order to improve the efficiency of the system. Simulation results are obtained using the hypercube architecture due to its simple design and high interconnectivity and results are compared with two existing schemes namely “Minimum Distance Scheduling” and “Two Round Scheduling".
{"title":"Successive stage multi-round scheduling for cube based multi-processor systems","authors":"Moin Hasan, Major Singh Goraya","doi":"10.1109/ICCIC.2014.7238340","DOIUrl":"https://doi.org/10.1109/ICCIC.2014.7238340","url":null,"abstract":"Multi-processor systems are advantageous in the sense that they allow concurrent execution of the given workload. The workload can be thought as the computation units which can be either processes or tasks. These processes or tasks can either be independent programs or partitioned modules of a single program. This paper presents an algorithm named as “Successive Stage Multi Round Scheduling” which is able to allocate and balance the given workload among the connected processing units of the Multi-processor system in order to improve the efficiency of the system. Simulation results are obtained using the hypercube architecture due to its simple design and high interconnectivity and results are compared with two existing schemes namely “Minimum Distance Scheduling” and “Two Round Scheduling\".","PeriodicalId":187874,"journal":{"name":"2014 IEEE International Conference on Computational Intelligence and Computing Research","volume":"116 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122784083","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-01DOI: 10.1109/ICCIC.2014.7238520
M. Beri
Control of direction of motor rotation is achieved via real-time image acquisition and processing. The model is prepared using Matlab and Simulink platforms and input is taken via any camera attached to the system. Commands are executed to rotate the rotor in either direction depending upon the movement of any object in front of the camera, be it a pencil, a pen, a human finger, a human eyeball or any body part for that matter. No costly system is required besides a webcam for image capturing and a dc motor. This novel controlling system befits all and highly reduces human effort. Besides bringing rapidity in execution of systems, it is a boon for the motor disabled.
{"title":"Rotation direction control by finger movement","authors":"M. Beri","doi":"10.1109/ICCIC.2014.7238520","DOIUrl":"https://doi.org/10.1109/ICCIC.2014.7238520","url":null,"abstract":"Control of direction of motor rotation is achieved via real-time image acquisition and processing. The model is prepared using Matlab and Simulink platforms and input is taken via any camera attached to the system. Commands are executed to rotate the rotor in either direction depending upon the movement of any object in front of the camera, be it a pencil, a pen, a human finger, a human eyeball or any body part for that matter. No costly system is required besides a webcam for image capturing and a dc motor. This novel controlling system befits all and highly reduces human effort. Besides bringing rapidity in execution of systems, it is a boon for the motor disabled.","PeriodicalId":187874,"journal":{"name":"2014 IEEE International Conference on Computational Intelligence and Computing Research","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121636673","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-01DOI: 10.1109/ICCIC.2014.7238518
R. Anbunathan, A. Basu
Android mobile testing is challenging as it involves several applications to be tested. Automated testing involves lot of script writing or instrumentation of source code. In this paper, designing a crawler algorithm without any source code instrumentation (Block box approach) is discussed. In this approach, UI Automator is the tool used to learn User Interface (UI) objects of each screen recursively. The properties of these objects are stored in a database for navigating through menu tree to detect application crash. The effectiveness of this method is studied and compared with other methods.
{"title":"A recursive crawler algorithm to detect crash in Android application","authors":"R. Anbunathan, A. Basu","doi":"10.1109/ICCIC.2014.7238518","DOIUrl":"https://doi.org/10.1109/ICCIC.2014.7238518","url":null,"abstract":"Android mobile testing is challenging as it involves several applications to be tested. Automated testing involves lot of script writing or instrumentation of source code. In this paper, designing a crawler algorithm without any source code instrumentation (Block box approach) is discussed. In this approach, UI Automator is the tool used to learn User Interface (UI) objects of each screen recursively. The properties of these objects are stored in a database for navigating through menu tree to detect application crash. The effectiveness of this method is studied and compared with other methods.","PeriodicalId":187874,"journal":{"name":"2014 IEEE International Conference on Computational Intelligence and Computing Research","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127680280","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-01DOI: 10.1109/ICCIC.2014.7238295
B. Jeevarani, Asst K Chitra, Professor
Nowadays cloud computing is the fastest growing technology that is used as a source of providing service through Internet. It is an enhanced model of Utility Computing. It embodies all technologies in Computer Architecture. It delivers the clients the needed applications, processes and Information as a service. It provides software platform as a service and virtualized servers, storage area and networks as a service. In addition to that it also manages and delivers database services. The traditional time consuming way of database management degrades the system performance. At present a weak form of consistency is maintained in cloud computing environment. This paper introduces an improved consistency model for cloud computing platform using prioritized read-write mechanism.
{"title":"Improved consistency model in cloud computing databases","authors":"B. Jeevarani, Asst K Chitra, Professor","doi":"10.1109/ICCIC.2014.7238295","DOIUrl":"https://doi.org/10.1109/ICCIC.2014.7238295","url":null,"abstract":"Nowadays cloud computing is the fastest growing technology that is used as a source of providing service through Internet. It is an enhanced model of Utility Computing. It embodies all technologies in Computer Architecture. It delivers the clients the needed applications, processes and Information as a service. It provides software platform as a service and virtualized servers, storage area and networks as a service. In addition to that it also manages and delivers database services. The traditional time consuming way of database management degrades the system performance. At present a weak form of consistency is maintained in cloud computing environment. This paper introduces an improved consistency model for cloud computing platform using prioritized read-write mechanism.","PeriodicalId":187874,"journal":{"name":"2014 IEEE International Conference on Computational Intelligence and Computing Research","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132797610","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-01DOI: 10.1109/ICCIC.2014.7238374
M. Bhanumurthy, Koteswararao Anne
Medical image segmentation is a crucial process which makes possible, the characterization and visualization of the structure of interest in medical images. Brain MRI segmentation is a more difficult procedure because of inconsistency of abnormal tissues like tumor. In this paper, we propose a fully automated technique that uses artificial intelligence to detect and segment abnormal tissues like tumor and atrophy in brain MRI images accurately. Three stages are offered in our work: (1) Feature Extraction (2) Classification and (3) Segmentation. The extracted features like energy, entropy, homogeneity, contrast and correlation from the brain MRI images are applied as input to an artificial intelligence system that uses a Neuro-fuzzy classifier which classifies the images into normal or abnormal. The abnormal tissues like tumor and atrophy are then segmented using region growing method. The accuracy of the segmentation results are assessed with metrics like False Positive Ratio (FPR), False Negative Ratio (FNR), Specificity, Sensitivity and Accuracy. This entire procedure is developed as a Graphical User Interface (GUI) system which results in automated detection and segmentation of tumor.
{"title":"An automated detection and segmentation of tumor in brain MRI using artificial intelligence","authors":"M. Bhanumurthy, Koteswararao Anne","doi":"10.1109/ICCIC.2014.7238374","DOIUrl":"https://doi.org/10.1109/ICCIC.2014.7238374","url":null,"abstract":"Medical image segmentation is a crucial process which makes possible, the characterization and visualization of the structure of interest in medical images. Brain MRI segmentation is a more difficult procedure because of inconsistency of abnormal tissues like tumor. In this paper, we propose a fully automated technique that uses artificial intelligence to detect and segment abnormal tissues like tumor and atrophy in brain MRI images accurately. Three stages are offered in our work: (1) Feature Extraction (2) Classification and (3) Segmentation. The extracted features like energy, entropy, homogeneity, contrast and correlation from the brain MRI images are applied as input to an artificial intelligence system that uses a Neuro-fuzzy classifier which classifies the images into normal or abnormal. The abnormal tissues like tumor and atrophy are then segmented using region growing method. The accuracy of the segmentation results are assessed with metrics like False Positive Ratio (FPR), False Negative Ratio (FNR), Specificity, Sensitivity and Accuracy. This entire procedure is developed as a Graphical User Interface (GUI) system which results in automated detection and segmentation of tumor.","PeriodicalId":187874,"journal":{"name":"2014 IEEE International Conference on Computational Intelligence and Computing Research","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134500063","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-01DOI: 10.1109/ICCIC.2014.7238382
A. Joshi, V. Mishra, R. Patrikar
H.264 is the advance video coding standard for the compression and distribution of a video content. It has larger complexity in order to satisfy the demand of high quality video at low bit rate. Moreover, it requires the effective implementation of all its internal blocks. In the paper, we focuses on the implementation of two important blocks for H.264 encoder. We propose low complexity design of quantization and Context Adaptive Variable Length Coding (CAVLC). The quantization process is responsible for scaling down the value of transform coefficients. CAVLC is useful for a bit stream generation and it is adopted from the concept of modified Variable Length Coding (VLC) technique. The efficient architectures are designed for quantization and CAVLC blocks to have parallel and pipeline data processing. They are implemented on Virtex 4 XC4VLX40 FPGA family using VHDL. The synthesized results are obtained with Xilinx ISE 14.2 and resource, device utilization and timing analysis are reported. The results are compared with related work that shows the better real time performance of both blocks.
H.264是用于压缩和分发视频内容的先进视频编码标准。为了满足低比特率下高质量视频的需求，它具有较大的复杂度。此外，它需要有效地实现其所有内部块。本文重点介绍了H.264编码器中两个重要模块的实现。我们提出了低复杂度的量化设计和上下文自适应变长编码(CAVLC)。量化过程负责缩小变换系数的值。CAVLC是由修改变长编码(VLC)技术的概念发展而来的，用于比特流的生成。为量化和CAVLC块设计了高效的体系结构，以实现并行和流水线数据处理。它们是在Virtex 4 XC4VLX40 FPGA系列上使用VHDL实现的。在Xilinx ISE 14.2中获得了综合结果，并报道了资源、器件利用率和时序分析。结果与相关工作进行了比较，表明两种模块的实时性能都更好。
{"title":"Low complexity hardware implementation of quantization and CAVLC for H.264 encoder","authors":"A. Joshi, V. Mishra, R. Patrikar","doi":"10.1109/ICCIC.2014.7238382","DOIUrl":"https://doi.org/10.1109/ICCIC.2014.7238382","url":null,"abstract":"H.264 is the advance video coding standard for the compression and distribution of a video content. It has larger complexity in order to satisfy the demand of high quality video at low bit rate. Moreover, it requires the effective implementation of all its internal blocks. In the paper, we focuses on the implementation of two important blocks for H.264 encoder. We propose low complexity design of quantization and Context Adaptive Variable Length Coding (CAVLC). The quantization process is responsible for scaling down the value of transform coefficients. CAVLC is useful for a bit stream generation and it is adopted from the concept of modified Variable Length Coding (VLC) technique. The efficient architectures are designed for quantization and CAVLC blocks to have parallel and pipeline data processing. They are implemented on Virtex 4 XC4VLX40 FPGA family using VHDL. The synthesized results are obtained with Xilinx ISE 14.2 and resource, device utilization and timing analysis are reported. The results are compared with related work that shows the better real time performance of both blocks.","PeriodicalId":187874,"journal":{"name":"2014 IEEE International Conference on Computational Intelligence and Computing Research","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115052972","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-01DOI: 10.1109/ICCIC.2014.7238284
Neha Kottawar, D. J. Tuptewar
In this paper comparative analysis of digital image stabilization (DIS) is proposed. For comparison purpose Basic Empirical Mode Decomposition (EMD), Improved EMD, Ensemble Empirical Mode Decomposition (EEMD) and Complete Ensemble Empirical Mode Decomposition (CEEMD) methods are considered. Method used for digital image stabilization is of fully data driven approach. With the comparative analysis best version of the EMD for DIS on the basis of low RMSE error is decided. The concept used to determine jitter is high frequency and low amplitude property. Combination of each EMD method and Hilbert Transform is used for the analysis. Various methods of EMD give the different results the better method for digital image stabilization is decided and parameters of EEMD and CEEMD method are globalised.
{"title":"Comparative analysis of digital image stabilization by using empirical mode decomposition methods","authors":"Neha Kottawar, D. J. Tuptewar","doi":"10.1109/ICCIC.2014.7238284","DOIUrl":"https://doi.org/10.1109/ICCIC.2014.7238284","url":null,"abstract":"In this paper comparative analysis of digital image stabilization (DIS) is proposed. For comparison purpose Basic Empirical Mode Decomposition (EMD), Improved EMD, Ensemble Empirical Mode Decomposition (EEMD) and Complete Ensemble Empirical Mode Decomposition (CEEMD) methods are considered. Method used for digital image stabilization is of fully data driven approach. With the comparative analysis best version of the EMD for DIS on the basis of low RMSE error is decided. The concept used to determine jitter is high frequency and low amplitude property. Combination of each EMD method and Hilbert Transform is used for the analysis. Various methods of EMD give the different results the better method for digital image stabilization is decided and parameters of EEMD and CEEMD method are globalised.","PeriodicalId":187874,"journal":{"name":"2014 IEEE International Conference on Computational Intelligence and Computing Research","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114091160","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-01DOI: 10.1109/ICCIC.2014.7238524
K. Raja, K. Vijayakumar, S. Kannan
Reactive power is a subject of great concern for the operation of Alternating Current (AC) power systems. It has always been a challenge to obtain the balance between a minimum amount of reactive power flow to maximize capacity for active power flow and a sufficient amount of reactive power flow to maintain a proper system voltage profile. This work mainly deals with the compensation of reactive power by using Solar Photovoltaic Power System. Single-phase matrix converter is used for developing AC voltage. Single-phase matrix converter can be used as a Rectifier and as an Inverter. The same system could be used for real power exchange utilizing free energy (Solar) thus minimizing the utility power supply. Bidirectional energy flow is possible with matrix converter for battery charging. Use of matrix converter improves the quality of output voltage with reduced Total Harmonic Distortion. Sinusoidal Pulse Width Modulation (SPWM) is used for generating pulses to the matrix converter. Digital control of proposed real and reactive power compensation improves the overall efficiency of the system and reliability.
{"title":"Matrix converter based solar photo voltaic system for reactive power compensation using sinusoidal pulse width modulation","authors":"K. Raja, K. Vijayakumar, S. Kannan","doi":"10.1109/ICCIC.2014.7238524","DOIUrl":"https://doi.org/10.1109/ICCIC.2014.7238524","url":null,"abstract":"Reactive power is a subject of great concern for the operation of Alternating Current (AC) power systems. It has always been a challenge to obtain the balance between a minimum amount of reactive power flow to maximize capacity for active power flow and a sufficient amount of reactive power flow to maintain a proper system voltage profile. This work mainly deals with the compensation of reactive power by using Solar Photovoltaic Power System. Single-phase matrix converter is used for developing AC voltage. Single-phase matrix converter can be used as a Rectifier and as an Inverter. The same system could be used for real power exchange utilizing free energy (Solar) thus minimizing the utility power supply. Bidirectional energy flow is possible with matrix converter for battery charging. Use of matrix converter improves the quality of output voltage with reduced Total Harmonic Distortion. Sinusoidal Pulse Width Modulation (SPWM) is used for generating pulses to the matrix converter. Digital control of proposed real and reactive power compensation improves the overall efficiency of the system and reliability.","PeriodicalId":187874,"journal":{"name":"2014 IEEE International Conference on Computational Intelligence and Computing Research","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115890353","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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