Xab is a run time monitoring tool for parallel virtual machine (PVM) programs. Xab gives the user direct feedback as to what PVM functions his or her program is performing. In its most simple form, this feedback is displayed in a window. The approach of real time monitoring is particularly apropos in a heterogeneous multiprogramming environment. Differences in computation and communication speeds here are due both to heterogeneity and external CPU and network loads. Monitoring can help give the user insight into how a program is behaving in such an environment. Xab is a continuing research project. The author discusses several related research projects, the current version of Xab, and the future development of the Xab tool. >
{"title":"Xab: A Tool for Monitoring Pvm Programs","authors":"A. Beguelin","doi":"10.1109/WHP.1993.664372","DOIUrl":"https://doi.org/10.1109/WHP.1993.664372","url":null,"abstract":"Xab is a run time monitoring tool for parallel virtual machine (PVM) programs. Xab gives the user direct feedback as to what PVM functions his or her program is performing. In its most simple form, this feedback is displayed in a window. The approach of real time monitoring is particularly apropos in a heterogeneous multiprogramming environment. Differences in computation and communication speeds here are due both to heterogeneity and external CPU and network loads. Monitoring can help give the user insight into how a program is behaving in such an environment. Xab is a continuing research project. The author discusses several related research projects, the current version of Xab, and the future development of the Xab tool. >","PeriodicalId":235913,"journal":{"name":"Proceedings. Workshop on Heterogeneous Processing,","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128194879","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper studies the problem of allocating the interacting task modules, of a parallel program, to the het,erogeneous processors in a parallel architecture. The goal is to provide a load balanced allocation which minimizes the completion time of the program. The problem of finding an optimal allocation is known to be an NP-hard problem, even if the processors are homogeneous, and thus necessitates development of heuristic schemes. This paper presents three heuristic algorithms for task assignment, based on simulated annealing, tabu search, and stochastic probe approaches respectively. We present an experimental analysis of these three heuristics and compare their performance. Experiments reveal that our new stochastic probe approach always yields the best solutions while requiring significantly less CPU time.
{"title":"Heuristics for Mapping Parallel Computations to Parallel Architectures","authors":"L. Tao, B. Narahari, Y.C. Zhao","doi":"10.1109/WHP.1993.664363","DOIUrl":"https://doi.org/10.1109/WHP.1993.664363","url":null,"abstract":"This paper studies the problem of allocating the interacting task modules, of a parallel program, to the het,erogeneous processors in a parallel architecture. The goal is to provide a load balanced allocation which minimizes the completion time of the program. The problem of finding an optimal allocation is known to be an NP-hard problem, even if the processors are homogeneous, and thus necessitates development of heuristic schemes. This paper presents three heuristic algorithms for task assignment, based on simulated annealing, tabu search, and stochastic probe approaches respectively. We present an experimental analysis of these three heuristics and compare their performance. Experiments reveal that our new stochastic probe approach always yields the best solutions while requiring significantly less CPU time.","PeriodicalId":235913,"journal":{"name":"Proceedings. Workshop on Heterogeneous Processing,","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-04-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129057307","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
I n this paper w e a t t e m p t t o define the requirem e n t s f o r a softwa.re env ironi i ien t in wh ich developm e n t of appl ica t ions targeted f o r execu t ion in a he terogeneous hardware cmvironirient c a n take place. S o m e t 001s in ee t i n g t h es e requ ire in e n t s ha v e been de v e 1 oped at A r g o n n e N a t i o n d Laboratory , and we describe their f u n ct i o ri alit y . We a Is o describe s eve ral appl ica t ions tha t are curren t l y t ak ing advan tage of t hese tools.
在这张纸上，我定义了应用程序。在其开发过程中，应用程序的目标是在其terogeneous硬件和一个take place中实现一个excu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cu - cuS或m和t 001s在ee t n g t h es和ire requ S和t v和的de 1 oped at A r g e v n和n号t或d实验室,and we describe及其f u号ct或alit y。我们描述了我们所拥有的一切，我们所拥有的一切，我们所拥有的一切，我们所拥有的一切，我们所拥有的一切，我们所拥有的一切，我们所拥有的一切，我们所拥有的一切，我们所拥有的一切，我们所拥有的一切，我们所拥有的一切，我们所拥有的一切，我们所拥有的一切。
{"title":"Developing Applications for a Heterogeneous Computing Environment","authors":"R. Butler, W. Gropp, E. Lusk","doi":"10.1109/WHP.1993.664370","DOIUrl":"https://doi.org/10.1109/WHP.1993.664370","url":null,"abstract":"I n this paper w e a t t e m p t t o define the requirem e n t s f o r a softwa.re env ironi i ien t in wh ich developm e n t of appl ica t ions targeted f o r execu t ion in a he terogeneous hardware cmvironirient c a n take place. S o m e t 001s in ee t i n g t h es e requ ire in e n t s ha v e been de v e 1 oped at A r g o n n e N a t i o n d Laboratory , and we describe their f u n ct i o ri alit y . We a Is o describe s eve ral appl ica t ions tha t are curren t l y t ak ing advan tage of t hese tools.","PeriodicalId":235913,"journal":{"name":"Proceedings. Workshop on Heterogeneous Processing,","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-04-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114466663","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Song Chen, M. M. Eshaghian, A. Khokhar, M. Shaaban
In this paper, a methodology for mapping algorithms onto heterogeneous suite of supercomputers is presented. A n approach for selecting an optimal suite of computers for solving problems with diverse computational requirements, called Heterogeneous Optimal Selection Theory (HOST), is presented. HOST is an extension t o Augmented Optimal Selection Theory in two ways: It incorporates heterogeneous parallelism embedded in the tasks, and it reflects the costs associated in using various fine grain mapping strategies at individual machine level. The proposed mapping methodology is based on the Cluster-M programming paradigm. For the mapping purpose, the input format, assumed in HOST, is modeled in terms of Hierarchical Cluster-M specification and representation. For a given problem, a hj'ierarchical Cluster-M specification is generated t o indicate the execution of concurrent tasks at different stizges of the computation. This specification is then mapped onto the Hierarchical ClusterM representation ofthe underlying heterogeneous suite of supercomputers.
{"title":"A Selection Theory and Methodology for Heterogeneous Supercomputing","authors":"Song Chen, M. M. Eshaghian, A. Khokhar, M. Shaaban","doi":"10.1109/WHP.1993.664360","DOIUrl":"https://doi.org/10.1109/WHP.1993.664360","url":null,"abstract":"In this paper, a methodology for mapping algorithms onto heterogeneous suite of supercomputers is presented. A n approach for selecting an optimal suite of computers for solving problems with diverse computational requirements, called Heterogeneous Optimal Selection Theory (HOST), is presented. HOST is an extension t o Augmented Optimal Selection Theory in two ways: It incorporates heterogeneous parallelism embedded in the tasks, and it reflects the costs associated in using various fine grain mapping strategies at individual machine level. The proposed mapping methodology is based on the Cluster-M programming paradigm. For the mapping purpose, the input format, assumed in HOST, is modeled in terms of Hierarchical Cluster-M specification and representation. For a given problem, a hj'ierarchical Cluster-M specification is generated t o indicate the execution of concurrent tasks at different stizges of the computation. This specification is then mapped onto the Hierarchical ClusterM representation ofthe underlying heterogeneous suite of supercomputers.","PeriodicalId":235913,"journal":{"name":"Proceedings. Workshop on Heterogeneous Processing,","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-04-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114194782","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
associative computing can be applied to heterogeneous networks to provide a high level method of programming. The principles of
关联计算可以应用于异构网络，提供一种高层次的编程方法。的原则
{"title":"Heterogeneous Associative Computing","authors":"J. Potter","doi":"10.1109/WHP.1993.664359","DOIUrl":"https://doi.org/10.1109/WHP.1993.664359","url":null,"abstract":"associative computing can be applied to heterogeneous networks to provide a high level method of programming. The principles of","PeriodicalId":235913,"journal":{"name":"Proceedings. Workshop on Heterogeneous Processing,","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-04-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121181099","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Recent trends towards real-time visualization of large, 3-0 datasets have created extraordinary demands on CPU, memory, and 1/0 resources. In this paper we describe how a metacomputing environment was used to perform a volumetric analysis of mixing in thermal convection. This application was judged the “Best of the Best” in the Heterogeneous Computing Challenge competition held at Supercomputing ’92. In this paper we show how the winning application was designed and implemented. We conclude with a discussion of some future issues that researchers and vendors need to address in order to provide better environments for large heterogeneous HPC applications.
{"title":"A Case Study in Metacomputing: Distributed Simulations of Mixing in Turbulent Convection","authors":"A.E. Klietzt, A. V. Malevsky, K. Chin-Purcell","doi":"10.1109/WHP.1993.664373","DOIUrl":"https://doi.org/10.1109/WHP.1993.664373","url":null,"abstract":"Recent trends towards real-time visualization of large, 3-0 datasets have created extraordinary demands on CPU, memory, and 1/0 resources. In this paper we describe how a metacomputing environment was used to perform a volumetric analysis of mixing in thermal convection. This application was judged the “Best of the Best” in the Heterogeneous Computing Challenge competition held at Supercomputing ’92. In this paper we show how the winning application was designed and implemented. We conclude with a discussion of some future issues that researchers and vendors need to address in order to provide better environments for large heterogeneous HPC applications.","PeriodicalId":235913,"journal":{"name":"Proceedings. Workshop on Heterogeneous Processing,","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-04-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122547071","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
We presents two heterogeneous processing (HP) problem representations that are 1) a program representation called a "Meta Graph" and 2) a targeted HP hardware configuration representation called an "Architecture Graph". These representations are inputs to an automatic mapping algorithm for HP environments [ 181. The paper discusses the definitions of the proposed representations and initial experimental results.
{"title":"Problem Representations for an Automatic Mapping Algorithm on Heterogeneous Processing Environments","authors":"C. Leangsuksun, J. Potter","doi":"10.1109/WHP.1993.664365","DOIUrl":"https://doi.org/10.1109/WHP.1993.664365","url":null,"abstract":"We presents two heterogeneous processing (HP) problem representations that are 1) a program representation called a \"Meta Graph\" and 2) a targeted HP hardware configuration representation called an \"Architecture Graph\". These representations are inputs to an automatic mapping algorithm for HP environments [ 181. The paper discusses the definitions of the proposed representations and initial experimental results.","PeriodicalId":235913,"journal":{"name":"Proceedings. Workshop on Heterogeneous Processing,","volume":"350 7","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-04-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132418490","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. G. Herter, T. M. Warschko, W. Tichy, M. Philippsen
We present the architecture of Triton/l, a scalable, mixed-mode (SIMLI/MIMD) parallel computer. The novel features of l?riton/l are: Support for hi,gh-level, machine-independent programming lamguages; Fast SIMD/MIMD mode switching; Special hardw
{"title":"Triton/1: A Massively-Parallel Mixed-Mode Computer Designed to Support High Level Languages","authors":"C. G. Herter, T. M. Warschko, W. Tichy, M. Philippsen","doi":"10.1109/WHP.1993.664368","DOIUrl":"https://doi.org/10.1109/WHP.1993.664368","url":null,"abstract":"We present the architecture of Triton/l, a scalable, mixed-mode (SIMLI/MIMD) parallel computer. The novel features of l?riton/l are: Support for hi,gh-level, machine-independent programming lamguages; Fast SIMD/MIMD mode switching; Special hardw<are for barrier synchronization of multiple process groups;","PeriodicalId":235913,"journal":{"name":"Proceedings. Workshop on Heterogeneous Processing,","volume":"172 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-04-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124182006","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Heterogeneity in computing environments is becoming increasingly common. Some consider this a problem, while others (including ourselves) prefer to think of it as a benefit. By exploiting the different features and capabilities of computer nodes in a heterogeneous computing network, higher levels of performance can be attained than is possible using any single type of computer found in the network. In this papel; we present the preliminary design of a heterogeneous computing environment being developed at CHPC. The environment includes a high-speed interconnection architecture capable of supporting shared memory, as well as a new programming environment for developing heterogeneous applications that exploit the available hardware.
{"title":"Heterogeneous by Design: An Environment for Exploiting Heterogeneity","authors":"R. LaRowe, T. Probert","doi":"10.1109/WHP.1993.664371","DOIUrl":"https://doi.org/10.1109/WHP.1993.664371","url":null,"abstract":"Heterogeneity in computing environments is becoming increasingly common. Some consider this a problem, while others (including ourselves) prefer to think of it as a benefit. By exploiting the different features and capabilities of computer nodes in a heterogeneous computing network, higher levels of performance can be attained than is possible using any single type of computer found in the network. In this papel; we present the preliminary design of a heterogeneous computing environment being developed at CHPC. The environment includes a high-speed interconnection architecture capable of supporting shared memory, as well as a new programming environment for developing heterogeneous applications that exploit the available hardware.","PeriodicalId":235913,"journal":{"name":"Proceedings. Workshop on Heterogeneous Processing,","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-04-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114293237","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
We examine the problem of optimizing the distribution of the m interacting task modules on a parallel system with p heterogeneous processors. Average-valued parameters are used to model the workload ana' to minimize a multimetric objective function representing a weighted combination of completion time, communication cost, utilization cost, and processor idle-time. The efficacy of a processing element is defined as a composite measure of its CPU speed, memory speed, and the workload coupling. The optimal distribution is found to be the apportionment of the total load among the qSp most efficacious processors in direct proportion to their efficacies. In the absence of synchronization delays, the optimal distribution results in equal execution time for all engaged processors, thus eliminating idle wait time and representing the ideal load "balancing" on the heterogeneous system.
{"title":"Load Distribution Optimization in Heterogeneous Multiple Processor Systems","authors":"E. Haddad","doi":"10.1109/WHP.1993.664364","DOIUrl":"https://doi.org/10.1109/WHP.1993.664364","url":null,"abstract":"We examine the problem of optimizing the distribution of the m interacting task modules on a parallel system with p heterogeneous processors. Average-valued parameters are used to model the workload ana' to minimize a multimetric objective function representing a weighted combination of completion time, communication cost, utilization cost, and processor idle-time. The efficacy of a processing element is defined as a composite measure of its CPU speed, memory speed, and the workload coupling. The optimal distribution is found to be the apportionment of the total load among the qSp most efficacious processors in direct proportion to their efficacies. In the absence of synchronization delays, the optimal distribution results in equal execution time for all engaged processors, thus eliminating idle wait time and representing the ideal load \"balancing\" on the heterogeneous system.","PeriodicalId":235913,"journal":{"name":"Proceedings. Workshop on Heterogeneous Processing,","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1993-04-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133347135","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：